Silicon--Nitride-Passivated Bottom-Up Single-Electron Transistors
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概要
- 論文の詳細を見る
We report the elaboration of SiN<inf>x</inf>-passivated chemically assembled single-electron transistors (SETs) by bottom-up processes involving electroless Au plating and the chemisorption of Au nanoparticles. With a Au top-gate electrode, the SiN<inf>x</inf>-passivated SETs showed a clear Coulomb diamond at 9 K and the top-gate capacitance was 17 times larger than the side-gate capacitance. Moreover, Coulomb oscillation and the Coulomb diamond were observed even at 160 K. Thus, planar technology is applicable to chemically assembled SETs.
- The Japan Society of Applied Physicsの論文
- 2013-11-25
著者
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MATSUMOTO Kazuhiko
CREST, Japan Science and Technology Agency
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Azuma Yasuo
Materials And Structures Laboratory Tokyo Institute Of Technology
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Majima Yutaka
Materials And Structures Laboratory Tokyo Institute Of Technology
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Kano Shinya
Materials And Structures Laboratory Tokyo Institute Of Technology
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Teranishi Toshiharu
CREST, Japan Science and Technology Agency (JST), Yokohama 226-8503, Japan
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Ohno Yasuhide
CREST---Japan Science and Technology Agency (JST), Chiyoda, Tokyo 102-0076, Japan
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Hackenberger Guillaume
Materials and Structures Laboratory, Tokyo Institute of Technology, Yokohama 226-8503, Japan
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Tanaka Daisuke
CREST---Japan Science and Technology Agency (JST), Chiyoda, Tokyo 102-0076, Japan
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Sakamoto Masanori
CREST---Japan Science and Technology Agency (JST), Chiyoda, Tokyo 102-0076, Japan
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Maehashi Kenzo
CREST---Japan Science and Technology Agency (JST), Chiyoda, Tokyo 102-0076, Japan
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Teranishi Toshiharu
CREST---Japan Science and Technology Agency (JST), Chiyoda, Tokyo 102-0076, Japan
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