A 1.2 V Power Supply, 2.43 Times Power Efficient, Adaptive Charge Pump Circuit with Optimized Threshold Voltage at Each Pump Stage for Ferroelectric-NAND Flash Memories

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概要

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• A 1.2 V power supply adaptive charge pump for the low voltage and low power ferroelectric (Fe)-NAND flash memory is proposed. The proposed circuit is fabricated with the complementary metal–oxide–semiconductor (CMOS) compatible ferroelectric-gate field-effect transistors (FeFETs) process for Fe-NAND flash memories. By using FeFETs as diodes in the charge pump and optimizing the threshold voltage ($V_{\text{TH}}$) of FeFETs at each pump stage, the power efficiency of the charge pump circuit to generate the program voltage increases from 21.7 to 52.7% without the circuit area and the process step penalty. The $V_{\text{TH}}$ optimization of FeFETs is realized by repeating the program and the monitor operations during the testing after the fabrication. During the testing, the power efficiency is monitored to detect the optimal $V_{\text{TH}}$ which maximizes the power efficiency at each pump stage. FeFETs in proposed circuits are immune to the disturb and a highly reliable circuit operation is experimentally demonstrated.

• Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
• 2010-04-25

著者

• Noda Shinji

  Department Of Neurosurgery Daiyukai Hospital

• Ken Takeuchi

  Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan

• Hatanaka Teruyoshi

  Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan

• Shigeki Sakai

  National Institute of Advanced Industrial Science and Technology, 1-1-1 Umezono, Tsukuba, Ibaraki 305-8568, Japan

• Ryoji Yajima

  Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan

• Miyaji Kousuke

  Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan

• Kousuke Miyaji

  Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan

• Teruyoshi Hatanaka

  Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan

• Mitsue Takahashi

  National Institute of Advanced Industrial Science and Technology, 1-1-1 Umezono, Tsukuba, Ibaraki 305-8568, Japan

• NODA Shinji

  Department of Dermatology, University of Tokyo Graduate School of Medicine

• Shinji Noda

  Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan

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