Hatanaka Teruyoshi | Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan
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概要
- Hatanaka Teruyoshiの詳細を見る
- 同名の論文著者
- Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japanの論文著者
関連著者
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Hatanaka Teruyoshi
Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan
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Takahashi Mitsue
National Inst. Of Advanced Industrial Sci. And Technol.
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Ken Takeuchi
Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan
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Yajima Ryoji
Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan
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Shigeki Sakai
National Institute of Advanced Industrial Science and Technology, 1-1-1 Umezono, Tsukuba, Ibaraki 305-8568, Japan
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Miyaji Kousuke
Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan
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Noda Shinji
Department Of Neurosurgery Daiyukai Hospital
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Sakai Shigeki
National Inst. Of Advanced Industrial Sci. And Technol.
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Takeuchi Ken
Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan
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Ryoji Yajima
Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan
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Kousuke Miyaji
Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan
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Teruyoshi Hatanaka
Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan
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Mitsue Takahashi
National Institute of Advanced Industrial Science and Technology, 1-1-1 Umezono, Tsukuba, Ibaraki 305-8568, Japan
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Tanakamaru Shuhei
Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan
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Takahashi Mitsue
National Institute of Advanced Industrial Science and Technology, 1-1-1 Umezono, Tsukuba, Ibaraki 305-8568, Japan
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NODA Shinji
Department of Dermatology, University of Tokyo Graduate School of Medicine
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Shinji Noda
Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo, Tokyo 113-8656, Japan
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Takeuchi Ken
Department of Electrical Engineering and Information Systems, Chuo University, Bunkyo, Tokyo 112-8551, Japan
著作論文
- A Negative Word-Line Voltage Negatively-Incremental Erase Pulse Scheme with $\Delta V_{\text{TH}} = 1/6\Delta V_{\text{ERASE}}$ for Enterprise Solid-State Drive Application Ferroelectric-NAND Flash Memories
- A 0.5-V Six-Transistor Static Random Access Memory with Ferroelectric-Gate Field Effect Transistors
- A 1.2 V Power Supply, 2.43 Times Power Efficient, Adaptive Charge Pump Circuit with Optimized Threshold Voltage at Each Pump Stage for Ferroelectric-NAND Flash Memories