Study on Compensation of Thermal Stresses in the Fabrication Process of Thin-Film Transistor
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概要
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It is essential to align masks without tolerance in every deposition step when fabricating thin-film transistors (TFTs) on a polymer substrate. However, the shrinkage of the polymer substrate due to thermal effect may arise during the deposition process. We observed the variation of shrinkage as a function of the annealing temperature. It was found that the substrates keep shrinking up to a critical temperature and stay the same above that point. The thermal treatment was conducted on substrates polycarbonate (PC), the polyarylate (PAR), and poly(ether sulfone) (PES). After predeposition annealing, the shrinkage was prevented but deformation was observed on the surface. An inorganic thin film with a different thermal expansion coefficient was employed to remove the deformation and this resulted in the elimination of strain.
- 2008-04-25
著者
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Kim Young-hwan
Department Of Electrical And Electronic Engineering Yonsei University
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Seo Dae-shik
Department Of Electrical & Computer Engineering College Of Engineering Yonsei University
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Park Yong-pil
Department Of Electronic Engineering Dongshin University
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Kim Byoung-yong
Department Of Electrical And Electronic Engineering College Of Engineering Yonsei University
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Kim Jong-hwan
Department Of Electrical And Electronic Engineering College Of Engineering Yonsei University
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Han Jeong-Min
Department of Electrical and Electronic Engineering (C-724), College of Engineering, Yonsei University, 134 Shinchon-dong, Seodaemoon-ku, Seoul 120-749, Korea
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Han Jin-Woo
Department of Electrical and Electronic Engineering (C-724), College of Engineering, Yonsei University, 134 Shinchon-dong, Seodaemoon-ku, Seoul 120-749, Korea
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Han Jin-Woo
Department of Electrical and Electronic Engineering, College of Engineering, Yonsei University, 134 Shinchon-dong, Seodaemoon-ku, Seoul 120-749, Korea
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Seo Dae-Shik
Department of Electrical and Electronic Engineering, College of Engineering, Yonsei University, 134 Shinchon-dong, Seodaemoon-ku, Seoul 120-749, Korea
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Kim Young-Hwan
Department of Electrical and Electronic Engineering, College of Engineering, Yonsei University, 134 Shinchon-dong, Seodaemoon-ku, Seoul 120-749, Korea
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Kim Byoung-Yong
Department of Electrical and Electronic Engineering, College of Engineering, Yonsei University, 134 Shinchon-dong, Seodaemoon-ku, Seoul 120-749, Korea
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Kim Byoung-Yong
Department of Electrical and Electronic Engineering (C-724), College of Engineering, Yonsei University, 134 Shinchon-dong, Seodaemoon-ku, Seoul 120-749, Korea
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Park Yong-Pil
Department of Electrical Engineering, College of Engineering, Dongshin University, Naju, Jeonnam 520-714, Korea
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Kim Jong-Hwan
Department of Electrical and Electronic Engineering, College of Engineering, Yonsei University, 134 Shinchon-dong, Seodaemoon-ku, Seoul 120-749, Korea
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Kim Jong-Hwan
Department of Electrical & Electronic Engineering, College of Engineering, Yonsei University, 134 Shinchon-dong, Seodaemoon-ku, Seoul 120-749, Korea
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