Effect of Back-Etching on Residual Stress in Lead Titanate Thin Films on Si Wafer
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概要
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This paper forcuses on the effect of back-etching on the residual stress in lead titanate (PT) thin film. The PT thin films were deposited by a chemical solution deposition (CSD) on a Pt/Ti/SiO2/Si substrate with different back-etching depth. The part of the Si substrates of 500 μm thickness was etched from back side (back-etching) with a wet etching process. The depth of the back-etching was controlled by changing the etching time in the range from 481.5 μm to 250 μm (residual Si; 18.5–250 μm). The residual stress in PT thin film was calculated from the phonon mode shift of raman scattering. In addition, the intrinsic dielectric constant for PT thin film was also calculated from the lattice mode frequencies. As a result, the residual stress in PT thin films abruptly increased with increasing depth of back-etching at around 300 μm (residual Si; 200 μm) and reached about 1.7 GPa.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2004-09-15
著者
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ISHIKAWA KENJI
Faculty of Policy Management, Yokkaichi University
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OHNO TOMOYA
Innovative Joint Research Center, Shizuoka University
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MASUI Hirohisa
Shizuoka Industrial Research Institute of Shizuoka Prefecture
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Fujimoto Masayuki
Innovative Joint Research Center Shizuoka University
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Suzuki Hisao
Department Of Electronic-mechanical Engineering Faculty Of Engineering Nagoya University
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Fujimoto Masayuki
Innovative Joint Research Center, Shizuoka University, 3-5-1 Johuku, Hamamatsu 432-8561, Japan
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Ohno Tomoya
Innovative Joint Research Center, Shizuoka University, 3-5-1 Johuku, Hamamatsu 432-8561, Japan
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Suzuki Hisao
Department of Material Science, Shizuoka University, 3-5-1 Johuku, Hamamatsu 432-8561, Japan
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Suzuki Hisao
Departmennt of Materials Science, Shizuoka University, 3-5-1 Johoku, Hamamatsu 432-8561, Japan
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