Reducing Photocurable Polymer Pattern Shrinkage and Roughness during Dry Etching in Photo-Nanoimprint Lithography
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概要
- 論文の詳細を見る
When we apply a photocurable polymer to photo-nanoimprint lithography, dry etching is necessary to remove the remaining photocurable polymer after imprinting. During dry etching, it is necessary to achieve pattern profiles with small pattern shrinkage, smooth surface, and low edge roughness. Room-temperature etching resulted in serious pattern shrinkage, but this was markedly reduced by substrate cooling (temperature $-120$°C). We obtained pattern shrinkage ranging from a maximum of 23 nm to a minimum of 4 nm under optimum etching conditions. We found that the surface of the photocurable polymer became rough and a large amount of polymer residue still remained after removing the remaining photocurable polymer. We obtained a smooth substrate surface by increasing both the RF power and total flow rate of the SF6/O2 gas mixture. Under optimum etching conditions, we obtained fine etch profiles of the photocurable polymer with a surface roughness of 2.5 nm, reduced pattern shrinkage, and a 3 nm line edge roughness.
- 2004-06-15
著者
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Inoue Seiji
Mirai Advanced Semiconductor Research Center National Institute Of Advanced Industrial Science And T
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KIM Sang
MIRAI, Advanced Semiconductor Research Center (ASRC), National Institute of Advanced Industrial Scie
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Komuro Masanori
MIRAI Project, Advanced Semiconductor Research Center (ASRC), National Institute of Advanced Industrial Science and Technology (AIST), 1-1-1 Umezono, Tsukuba, Ibaraki 305-8568, Japan
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Komuro Masanori
MIRAI, Advanced Semiconductor Research Center, National Institute of Advanced Industrial Science and Technology, 1-1-1 Umezono, Tsukuba, Ibaraki 305-8568, Japan
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Kim Sang
MIRAI, Advanced Semiconductor Research Center, National Institute of Advanced Industrial Science and Technology, 1-1-1 Umezono, Tsukuba, Ibaraki 305-8568, Japan
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Kurashima Yuichi
MIRAI Project, Advanced Semiconductor Research Center (ASRC), National Institute of Advanced Industrial Science and Technology (AIST), 1-1-1 Umezono, Tsukuba, Ibaraki 305-8568, Japan
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Hiroshima Hiroshi
MIRAI Project, Advanced Semiconductor Research Center (ASRC), National Institute of Advanced Industrial Science and Technology (AIST), 1-1-1 Umezono, Tsukuba, Ibaraki 305-8568, Japan
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Hiroshima Hiroshi
MIRAI, Advanced Semiconductor Research Center, National Institute of Advanced Industrial Science and Technology, 1-1-1 Umezono, Tsukuba, Ibaraki 305-8568, Japan
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