Efficient Improvement of Hot-Carrier-Induced Device’s Degradation for Sub-0.1 μm Complementary Metal-Oxide-Semiconductor Field-Effect-Transistor Technology

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概要

• 論文の詳細を見る

• The effect of post-thermal annealing (PA) after In-halo and As-halo implantation on the reliability of sub-0.1 μm complementary metal-oxide-semiconductor field-effect-transistors was investigated. We found that the control of annealing time is more efficient than that of annealing temperature with respect to improving hot-carrier-induced device’s degradation. The optimal results of device performance as well as of reliability can be obtained with post-annealing treatment performed at medium temperatures (e.g., 900°C) for a longer time.

• 2004-04-15

著者

• Lei Tan-fu

  Department Of Electronic Engineering National Chiao Tung University

• Yeh Wen-kuan

  Electrical Engineering Department National University Of Kaohsiung

• LIN Jung-Chun

  Department of Electronics Engineering, National Chiao Tung University

• Lei Tan-Fu

  Department of Electronics Engineering, National Chiao Tung University, Hsin-Chu, Taiwan

• Yeh Wen-Kuan

  Electrical Engineering Department, National University of Kaohsiung, No. 700, Kaohsiung University Rd., Nan-Tzu Dist., Kaohsiung, Taiwan

• Lin Jung-Chun

  Department of Electronics Engineering, National Chiao Tung University, Hsin-Chu, Taiwan

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