W-04 NEXUS-the Next Generation e-Learning System-and FPGA Hardware Design Platform(International Session)
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概要
- 論文の詳細を見る
FPGA (Field Programmable Gate Array) is a widely known logic device which implements its internal circuit by programming. It has been mainly used in computer and LSI engineers as a prototype of LSI development. Currently, researchers who are in other fields keep their eyes on FPGA design and challenge to implement their sophisticated methods and applications into hardware. However, researchers who do have LSI design experiences must overcome barriers such as learning hardware knowledge and setup of FPGA design environments. Our developed platform named as "NEXUS" (Next-generation EXtra University-education System) provides FPGA research and education environment by e-Learning system and remote controlled FPGA, which guarantees a smooth collaboration between interdisciplinary researchers on FPGAs. We present the NEXUS platform and report the interdisciplinary project of "high-speed information search on FPGAs" as instances by utilization of this platform. In the project, we have studied the FPGA implementations in wireless communication and regular expression matching.
- 2011-09-09
著者
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Yoshizawa Shingo
Graduate School Of Engineering Hokkaido University
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Miyanaga Yoshikazu
Graduate School Of Information Science And Technology Hokkaido University
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Miyanaga Yoshikazu
Graduate School Of Engineering Hokkaido University
関連論文
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- Tunable Wordlength Architecture for a Low Power Wireless OFDM Demodulator(VLSI Design Technology and CAD)
- VLSI Implementation of a Complete Pipeline MMSE Detector for a 4 × 4 MIMO-OFDM Receiver
- A Flexible Architecture for Digital Signal Processing(VLSI System)
- Noise-Robust Speech Analysis Using Running Spectrum Filtering(Speech and Hearing)
- Cepstral Amplitude Range Normalization for Noise Robust Speech Recognition(Speech and Hearing)
- Acoustic Analysis of Vocal Tract Using Auto-Mesh Generation of Finite Element Modeling(Digital Signal Processing)
- High-Speed Finite Element Computation in 3-D Acoustical Analysis of Vocal Tract
- VLSI Implementation of a Scalable Pipeline MMSE MIMO Detector for a 4 x 4 MIMO-OFDM Receiver
- W-04 NEXUS-the Next Generation e-Learning System-and FPGA Hardware Design Platform(International Session)
- Performance and Complexity of MIMO Detectors for Advanced Wireless Communications Systems
- Connectivity Modeling Analysis in Flight-Path Based Aviation Ad Hoc Networks
- New Error Resilience Technique Using Adaptive FMO and Intra Refresh for H.264 Video Transmission
- Design of Area- and Power-Efficient Pipeline FFT Processors for 8x8 MIMO-OFDM Systems
- Development and Outdoor Evaluation of an Experimental Platform in an 80-MHz Bandwidth 2×2 MIMO-OFDM System in 5.2-GHz Band
- A Noise-Robust Continuous Speech Recognition System Using Block-Based Dynamic Range Adjustment
- A Dynamically Reconfigurable FPGA-Based Pattern Matching Hardware for Subclasses of Regular Expressions
- A Dynamically Reconfigurable FPGA-Based Pattern Matching Hardware for Subclasses of Regular Expressions
- A Low Power Tone Recognition for Automatic Tonal Speech Recognizer
- Low-Power Dynamic MIMO Detection for a 4×4 MIMO-OFDM Receiver
- A VLSI Design of a Tomlinson-Harashima Precoder for MU-MIMO Systems Using Arrayed Pipelined Processing
- A Robust Speech Communication into Smart Info-Media System
- Efficiency Improvement in Dynamic Time Warping Algorithms for Isolated Word Recognition