A Flexible Architecture for Digital Signal Processing(VLSI System)

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概要

• 論文の詳細を見る

• In this paper, we introduce a flexible design for intellectual property (IP) which has become important to design system LSI. The proposed IPs which have high flexibility for user requirement. The design priority is determined by setting parameters as the number of arithmetic unit, internal bitlength, clock speed and so on. The design time can thus be reduced. Designed IP is based on the reconfigurable architecture in which many structures can be dynamically selected. This paper shows a implementation of Frequency Response Masking digital filter (FRM) and Principal Components Analysis (PCA) using a reconfigurable architecture. We show the method to realize the designed circuit and the results of experiments using field programmable gate array (FPGA).

• 2003-10-01

著者

• Dejhan Kobchai

  King Mongkut's Institute Of Technology Ladkrabang University

• Miyanaga Yoshikazu

  Graduate School Of Information Science And Technology Hokkaido University

• BOONKUMKLAO Wichai

  Graduate School of Engineering, Hokkaido University

• Boonkumklao Wichai

  Graduate School Of Engineering Hokkaido University

• Miyanaga Yoshikazu

  Graduate School Of Engineering Hokkaido University

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