A Hardware Algorithm for Integer Division Using the SD2 Representation(VLSI Design Technology and CAD)
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概要
- 論文の詳細を見る
A hardware algorithm for integer division is proposed. It is based on the radix-2 non-restoring division algorithm. Fast computation is achieved by the use of the radix-2 signed-digit (SD2) representation. The algorithm does not require normalization of the divisor, and hence, does not require an area-consuming leading-one (or zero) detection nor shifts of variable-amount. Combinational (unfolded) implementation of the algorithm yields a regularly structured array divider, and sequential implementation yields compact dividers.
- 社団法人電子情報通信学会の論文
- 2006-10-01
著者
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Takagi Kazuyoshi
Department Of Surgery Kurume University School Of Medicine
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TAKAGI Naofumi
Department of Information Engineering, Nagoya University
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KADOWAKI Shunsuke
Department of Information Engineering, Nagoya University
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Takagi Naofumi
Department Of Information Engineering Nagoya University
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Takagi Kazuyoshi
Department Of Applied Chemistry Faculty Of Life Sciences Ritsumeikan University
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Takagi Naofumi
Department Of Communications And Computer Engineering Kyoto University
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Kadowaki Shunsuke
Department Of Information Engineering Nagoya University
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