Novel Structures for a 2-Bit per Cell of Nonvolatile Memory Using an Asymmetric Double Gate(Si Devices and Processes,<Special Section>Fundamental and Application of Advanced Semiconductor Devices)
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概要
- 論文の詳細を見る
A 2-bit operational metal/silicon-oxide-nitride-oxide-silicon (MONOS/SONOS) nonvolatile memory using an asymmetric double-gate (ASDG) MOSFET was studied to double flash memory density. The 2-bit programming and erasing was performed by Fowler-Nordheim (FN) tunneling in a NAND array architecture using individually controlled gates. A threshold voltage shift of programmed states for the 2-bit operation was investigated with the aid of a SILVACO^[○!R] simulator in both sides of the gate by changing gate workfunctions and tunneling oxide thicknesses. In this paper, the scalability of the device down to 30nm was demonstrated by numerical simulation. Additionally, guidelines of the 2-bit ASDG nonvolatile memory (NVM) structure and operational conditions were proposed for "program," "read," and "erase."
- 社団法人電子情報通信学会の論文
- 2006-05-01
著者
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Choi Yang
Dept. Of Eecs Korea Advanced Institute Of Science And Technology
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Choi Yang-kyu
Electrical Eng. Dept. Nanobioelectronic Lab. Korean Advanced Inst. Of Science And Technology
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Choi Yang-kyu
Dept. Of Eecs Korea Advanced Institute Of Science And Technology
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Kim Kuk-Hwan
Dept. of EECS, Korea Advanced Institute of Science and Technology
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LEE Hyunjin
Dept. of EECS, Korea Advanced Institute of Science and Technology
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Kim Kuk
Dept. Of Eecs Korea Advanced Institute Of Science And Technology
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Kim Kuk-hwan
Dept. Of Eecs Korea Advanced Institute Of Science And Technology
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Lee Hyunjin
Dept. Of Eecs Korea Advanced Institute Of Science And Technology
関連論文
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- Novel Structures for a 2-Bit per Cell of Nonvolatile Memory Using an Asymmetric Double Gate(Si Devices and Processes,Fundamental and Application of Advanced Semiconductor Devices)
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