An Analytical Delay Model for Read Operation at Any Position on Dyamic Random Access Memory Bit Lines

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概要

• 論文の詳細を見る
• 社団法人応用物理学会の論文
• 1999-04-30

著者

• Wong S‐c

  Taiwan Semiconductor Manufacturing Co. Hsinchu Twn

• LIN Hongchin

  Department of Electrical Engineering, National Chung-Hsing University

• SHA Chia-Hsiang

  Departmant of Electrical Engineering, National Chung-Hsing University

• WONG Shyh-Chyi

  Winbond Electronics Corp.

• Lin Hongchin

  Departmant Of Electrical Engineering National Chung-hsing University

• Sha Chia-hsiang

  Departmant Of Electrical Engineering National Chung-hsing University

関連論文

• Generalized Interconnect Delay Time and Crosstalk Models: II. Crosstalk-Induced Delay Time Deterioration and Worst Crosstalk Models : Semiconductors
• Generalized Interconnect Delay Time and Crosstalk Models: I. Applications of Interconnect Optimization Design : Semiconductors
• A New Dual Floating Gate Flash Cell for Multilevel Operation
• A New Dual Floating Gate Flash Cell for Multilevel Operation
• An Analytical Delay Model for Read Operation at Any Position on Dyamic Random Access Memory Bit Lines
• An Analytical Delay Model for Read Operation at Any Position on DRAM Bit Lines
• Enhanced p-Channel Metal–Oxide–Semiconductor Field-Effect Transistor Charge Pump for Low-Voltage Applications
• Reduced-Ripple p-Channel Metal--Oxide--Semiconductor Field-Effect Transistor Charge Pump Circuit with Small Filtering Capacitance
• A New Dual Floating Gate Flash Cell for Multilevel Operation
• A p-Channel Metal–Oxide–Semiconductor Field-Effect Transistor Charge Pump for Low Supply Voltages
• Area-Efficient High-Throughput Parallel Scramblers Using Generalized Algorithms

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