Extremely High Selective Etching of Porous Si for Single Etch-Stop Bond-and-Etch-Back Silicon-on-Insulator
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概要
- 論文の詳細を見る
- 社団法人応用物理学会の論文
- 1995-02-28
著者
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Yonehara Takao
Device R&d Headquarters Canon Inc.
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Sato N
Eltran Project Device Development Center Canon Inc.
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Sato Norihiro
Graduate School Of Science And Engineering Tokyo Institute Of Technology
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Yamagata Kenji
Eltran Project Device Development Center Canon Inc.
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Yonehara T
Canon Inc. Kanagawa Jpn
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SAKAGUCHI Kiyofumi
ELTRAN Project, Device Development Center, Canon Inc.
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FUJIYAMA Yasutomo
ELTRAN Project, Device Development Center, Canon Inc.
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SATO Nobuhiko
Device Development Center, R&D Headquarters, Canon Inc.
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SAKAGUCHI Kiyofumi
Device Development Center, R&D Headquarters, Canon Inc.
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YAMAGATA Kenji
Device Development Center, R&D Headquarters, Canon Inc.
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FUJIYAMA Yasutomo
Device Development Center, R&D Headquarters, Canon Inc.
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Fujiyama Yasutomo
Eltran Project Device Development Center Canon Inc.
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Sakaguchi K
Eltran Project Device Development Center Canon Inc.
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Sato N
Department Of Electronic Engineering Tohoku University
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Fujiyama Yasutomo
Device Development Center, R&D Headquarters, Canon Inc. 6770 Tamura, Hiratsuka, Kanagawa 254, Japan
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Sato Nobuhiko
Device Development Center, R&D Headquarters, Canon Inc. 6770 Tamura, Hiratsuka, Kanagawa 254, Japan
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Yamagata Kenji
Device Development Center, R&D Headquarters, Canon Inc. 6770 Tamura, Hiratsuka, Kanagawa 254, Japan
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Yonehara Takao
Device Development Center, R&D Headquarters, Canon Inc. 6770 Tamura, Hiratsuka, Kanagawa 254, Japan
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Sakaguchi Kiyofumi
Device Development Center, R&D Headquarters, Canon Inc. 6770 Tamura, Hiratsuka, Kanagawa 254, Japan
関連論文
- Thermal Stress Relaxation in GaAs Layer on New Thin Si Layer over Porous Si Substrate Grown by Metalorganic Chemical Vapor Deposition
- Gain Improvement of a 2.4-GHz/5-GHz CMOS Low Noise Amplifier by Using High-Resistivity Silicon-on-Insulator Wafers
- Gain Improvement of a 2.4-GHz/5-GHz CMOS Low Noise Amplifier by Using High-Resistivity Silicon-on-Insulator Wafers(Devices and Circuits for Next Generation Multi-Media Communication Systems)
- Comparison in Splitting Bonded SOI by Solid and Fluid Wedges (Water and Air Jets)
- Defect Engineering in Epitaxial Layers over Porous Silicon for ELTRAN^【○!R】 SOI Wafers
- Extremely Low Si Etching (
- Current Progress in Epitaxial Layer Transfer (ELTRAN^[○!R]) (Special Issue on SOI Devices and Their Process Technologies)
- Advanced Quality in Epitaxial Layer Transfer by Bond and Etch-back of Porous Si
- Advanced Quality in Epitaxial Layer Transfer by Bond and Etch-Back of Porous Si
- Extremely High Selective Etching of Porous Si for Single Etch-Stop Bond-and-Etch-Back Silicon-on-Insulator
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- Complex Form Bandpass Sampling with Offset Frequency Sampling and Quadrature Component Interpolation for Modulated Signals
- Practical High-Resistivity Silicon-on-Insulator Solution for Spiral Inductors in Radio-Frequency Integrated Circuits
- Advanced Quality in Epitaxial Layer Transfer by Bond and Etch-back of Porous Si