A Current-Mode Implementation of a Chaotic Neuron Model Using a SI Integrator

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概要

• 論文の詳細を見る

• This paper presents an improved current-mode circuit for implementation of a chaotic neuron model. The proposed circuit uses a switched-current integrator and a nonlinear output function circuit, which is based on an operational transconductance amplifier, as building blocks. It is shown by SPICE simulations and experiments using discrete elements that the proposed circuit well replicates the behavior of the chaotic neuron model.

• 社団法人電子情報通信学会の論文
• 1994-01-25

著者

• Aihara K

  Univ. Tokyo Tokyo Jpn

• Aihara K

  Department Of Complexity Science And Engineering Graduate School Frontier Sciences The University Of

• Nakamura S

  Toyama Univ. Toyama Jpn

• AIHARA Kazuyuki

  Faculty of Engineering, The University of Tokyo and CREST, Japan Science and Technology Corporation

• Nakamura S

  Nichia Chemical Ind. Ltd. Tokushima Jpn

• Nakamura S

  Nec Corp. Ibaraki Jpn

• Kanou Nobuo

  Faculty of Engineering, Tokyo Denki University

• Horio Yoshihiko

  Center for Telecommunications Research, Columbia University

• Nakamura Shogo

  Faculty of Engineering, Tokyo Denki University

• Kanou Nobuo

  Faculty Of Engineering Tokyo Denki University

• Horio Y

  Tokyo Denki Univ. Tokyo Jpn

• Horio Yoshihiko

  Center For Telecommunications Research Columbia University

• Aihara Kazuyuki

  Faculty Of Engineering The University Of Tokyo

• Nakamura Shogo

  Faculty Of Engineering Osaka University

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