Analog Hardware Implementation of a Mathematical Model of an Asynchronous Chaotic Neuron(<特集>Special Section on Analog Circuit Techniques and Relate)
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概要
- 論文の詳細を見る
A number of studies have recently been published concerning chaotic neuron models and asynchronous neural networks having chaotic neuron models. In the case of large-scale neural networks having chaotic neuron models, the neural network should be constructed using analog hardware, rather than by computer simulation via software, due to the high speed and high integration of analog circuits. In the present study, we discuss the circuit structure of a chaotic neuron model, which is constructed on the basis of the mathematical model of an asynchronous chaotic neuron. We show that the pulse-type hardware chaotic neuron model can be constructed on the basis of the mathematical model of an asynchronous chaotic neuron. The proposed model is an effective model for the cell body section of the pulse-type hardware chaotic neuron model for ICs. In addition, we show the bifurcation structure of our composed model, and discuss the bifurcation routes and return maps thereof.
- 社団法人電子情報通信学会の論文
- 2002-02-01
著者
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Aihara K
Univ. Tokyo Tokyo Jpn
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Aihara K
Department Of Complexity Science And Engineering Graduate School Frontier Sciences The University Of
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Matsuoka Jun
Graduate School Of Science & Technology Nihon University
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AIHARA Kazuyuki
Graduate School of Engineering, The University of Tokyo
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SEKINE Yoshifumi
Dept. of Electronics & Computer Science, College of Science & Technology, Nihon University
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SAEKI Katsutoshi
Dept. of Electronics & Computer Science, College of Science & Technology, Nihon University
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Sekine Y
Nihon Univ. Funabashi‐shi Jpn
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Saeki K
Department Of Electronics & Computer Science College Of Science & Technology Nihon Universit
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Aihara Kazuyuki
Graduate School Of Engineering The University Of Tokyo
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