IC Implementation of a Switched-Current Chaotic Neuron (Special Section on Nonlinear Theory and Its Applications)

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概要

• 論文の詳細を見る

• A switched-current integrated circuit, which realizes the chaotic neuron model, is presented. The circuit mainly consists of CMOS inverters that are used as transconductance amplifiers and nonlinear elements. The chip was fabricated using a 1.2 μm HP CMOS process. A single neuron cell occupies only 0.0076 mm^2, which represents an area smaller than the one occupied by a standard bonding pad. The circuit operation was tested at a clock frequency of 2 MHz.

• 社団法人電子情報通信学会の論文
• 1999-09-25

著者

• Horio Yoshihiko

  Department Of Electronic Engineering Tokyo Denki University

• Horio Yoshihiko

  Department Of Electronic Engineering Tokyo-denki University

• Aihara Kazuyuki

  Graduate School Of Engineering The University Of Tokyo:crest Japan Science And Technology Co. (jst)

• Herrera Ruben

  Department Of Electrical Engineering Columbia University

• Aihara Kazuyuki

  Graduate School Of Engineering The University Of Tokyo

• SUYAMA Ken

  Epoch Technologies, L.L.C.

• Suyama Ken

  Epoch Technologies L.l.c.

• AIHARA Kazuyuki

  Graduate School of Engineering, The University of Tokyo:CREST, Japan Science and Technology Co. (JST)

関連論文

• Pulse-Type Bursting Neuron Model Using Enhancement Mode MOSFETs
• Analog Hardware Implementation of a Mathematical Model of an Asynchronous Chaotic Neuron(Special Section on Analog Circuit Techniques and Relate)
• Nonlinear Resistor Circuits Using Capacitively Coupled Multi-Input MOSFETs
• Asynchronous Pulse Neural Network Model for VLSI Implementation (Special Section on Nonlinear Theory and Its Applications)
• A Neuronal Time Window for Coincidence Detection (Special Section on Nonlinear Theory and Its Applications)
• IC Implementation of a Switched-Current Chaotic Neuron (Special Section on Nonlinear Theory and Its Applications)

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