Design of an Automatic Testing for FPGAs (特集 VLSIプロセッサ及び新アーキテクスチャLSI技術、一般)
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概要
- 論文の詳細を見る
This paper presents a new design for testing SRAM-based field programmable gate arrays (FPGAs). The original SRAM part is modified a bit so that the FPGA gets the ability to automatically test itself. This method does not need a large outside FPGA memory (off-chip memory) and it can be used either by the company after fabrication of FPGA or by the normal users. It is proved that this method detects multiple faults, covers 100% of modeled faults and the test time is very short comparing with other approaches. The simulation results of Xilinix XC4000 family, using CAD tools, shows that the routing and the placement of this method are easily achieved.
- 社団法人電子情報通信学会の論文
- 1999-04-16
著者
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ITO Hideo
Department of Medical Technology, Nagoya University Graduate School of Health Science
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Ito Hideo
The Authors Are With The Faculty Of Engineering Chiba University
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Ohmameuda Toshiaki
The Authors Are With The Faculty Of Engineering Chiba University
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Ohmameuda Toshiaki
Department Of Information And Image Sciences Chiba University
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Doumar Abderrahim
Graduate School of Science and Technology, Chiba University, Japan
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Doumar Abderrahim
Graduate School Of Science And Technology Chiba University
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Ito Hideo
Department Of Agronomy Faculty Of Agriculture Tohoku University
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OHMAMEUDA Toshiaki
Department of Electronic Engineering, The University of Tokyo
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