Ni-Znフェライトインダクタを集積したマイクロ電源のCMOS-IC負荷における電源ノイズに関する実験的検討

概要

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This paper describes an experimental study of the conduction noise of a micro dc-dc converter during high-speed CMOS-logic IC loading. For comparison, experimental results obtained by using a commercialized on-board dc-dc converter are also shown. When the dc-dc converter is used as the power supply of the CMOS logic circuit, the converter noise is modulated by the clock signal of the CMOS-IC, and transmitted to the logic circuit by amplitude modulation. Since the output noise of the micro dc-dc converter module is very small, the effect of amplitude modulation by the clock signal of the CMOS-IC is relatively small. The low noise level is due to the small leakage flux of the inductor with a closed magnetic circuit, and small parasitic inductance in the converter circuit.
社団法人日本磁気学会の論文
2003-09-01