Development of Cryogenic Readout Electronics for Far-Infrared Astronomical Focal Plane Array
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概要
- 論文の詳細を見る
We have been developing low power cryogenic readout electronics for space borne large format far-infrared image sensors. As the circuit elements, a fully-depleted-silicon-on-insulator (FD-SOI) CMOS process was adopted because they keep good static performance even at 4.2K where where various anomalous behaviors are seen for other types of CMOS transistors. We have designed and fabricated several test circuits with the FD-SOI CMOS process and confirmed that an operational amplifier successfully works with an open loop gain over 1000 and with a power consumption around 1.3µW as designed, and the basic digital circuits worked well. These results prove that the FD-SOI CMOS process is a promising candidate of the ideal cryogenic readout electronics for far-infrared astronomical focal plane array sensors.
- （社）電子情報通信学会の論文
- 2011-11-01
著者
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Wada Takehiko
Institute Of Multidisciplinary Research For Advanced Materials Tohoku University
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Ikeda Hirokazu
Institute of Space and Astronautical Science Japan Aerospace Exploration Agency
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Arai Yasuo
High Energy Accelerator Research Organization
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Ohno Morifumi
National Institute of Advanced Industrial Science and Technology
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Wada Takehiko
Institute Of Space And Astronautical Science Japan Aerospace Exploration Agency
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Nagata Hirohisa
Institute Of Space And Astronautical Science Japan Aerospace Exploration Agency
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大野 守史
沖セミコンダクター(株)
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Ohno Morifumi
Semiconductor Technology Laboratory Oki Electric Industry Co. Ltd.
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大野 守史
静岡大学電子工学研究所
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大野 守史
(株) ソルテック
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Nagase Koichi
Graduate University For Advanced Studies
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IKEDA Hirokazu
Institute of Space and Astronautical Science (ISAS), Japan Aerospace Exploration Agency (JAXA)
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