Highly Reliable Multiple-Valued Current-Mode Comparator Based on Active-Load Dual-Rail Operation
スポンサーリンク
概要
- 論文の詳細を見る
In this paper, a multiple-valued current-mode (MVCM) circuit based on active-load dual-rail differential logic is proposed for a high-performance arithmetic VLSI system with crosstalk-noise immunity. The use of dual-rail complementary differential-pair circuits (DPCs), whose outputs are summed up by wiring makes it possible to reduce the common-mode noise, and yet enhance the switching speed. By using the diode-connected cross-coupled PMOS active loads, the rapid transition of switching in the DPC is relaxed appropriately, which can also eliminate spiked input noise. It is demonstrated that the noise reduction ratio and the switching delay of the proposed MVCM circuit in a 90nm CMOS technology is superior to those of the corresponding ordinary implementation.
- (社)電子情報通信学会の論文
- 2008-04-01
著者
-
Hanyu Takahiro
Research Institute Of Electrical Communication Tohoku University
-
Miura Masatomo
Research Institute Of Electrical Communication Tohoku University
関連論文
- Power-Aware Asynchronous Peer-to-Peer Duplex Communication System Based on Multiple-Valued One-Phase Signaling
- High-Throughput Bit-Serial LDPC Decoder LSI Based on Multiple-Valued Asynchronous Interleaving
- Design and Evaluation of a 54×54-bit Multiplier Based on Differential-Pair Circuitry(Digital,Low-Power, High-Speed LSIs and Related Technologies)
- Design of a Low-Power Quaternary Flip-Flop Based on Dynamic Differential Logic(Novel Device Architectures and System Integration Technologies)
- TMR-Based Logic-in-Memory Circuit for Low-Power VLSI(Papers Selected from ITC-CSCC 2004)
- Dynamically Function-Programmable Bus Architecture for High-Throughput Intra-Chip Data Transfer(New System Paradigms for Integrated Electronics)
- Low-Power Motion-Vector Detection VLSI Processor Based on Pass-Gate Logic with Dynamic Supply-Voltage/Clock-Frequency Scaling(New System Paradigms for Integrated Electronics)
- Low-Power Multiple-Valued Current-Mode Logic Using Substrate Bias Control(Low-Power System LSI, IP and Related Technologies)
- Design and Evaluation of a NULL-Convention Circuit Based on Dual-Rail Current-Mode Differential Logic(Novel Device Architectures and System Integration Technologies)
- Fabrication of a Nonvolatile Full Adder Based on Logic-in-Memory Architecture Using Magnetic Tunnel Junctions
- Highly Reliable Multiple-Valued One-Phase Signalling for an Asynchronous On-Chip Communication Link
- Differential Operation Oriented Multiple-Valued Encoding and Circuit Realization for Asynchronous Data Transfer(New System Paradigms for Integrated Electronics)
- Highly Reliable Multiple-Valued Current-Mode Comparator Based on Active-Load Dual-Rail Operation
- Energy-Aware Multiple-Valued Current-Mode Sequential Circuits Using a Completion-Detection Scheme
- Implementation of a High-Speed Asynchronous Data-Transfer Chip Based on Multiple-Valued Current-Signal Multiplexing(Novel Device Architectures and System Integration Technologies)
- High-throughput CAM based on a synchronous overlapped search scheme
- Open-Fault Resilient Multiple-Valued Codes for Reliable Asynchronous Global Communication Links
- Special Section on Novel Device Architectures and System Integration Technologies