Nakaiso Toshiyuki | Area Of Materials And Device Physics Department Of Physical Science Graduate School Of Engineering S
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概要
- NAKAISO Toshiyukiの詳細を見る
- 同名の論文著者
- Area Of Materials And Device Physics Department Of Physical Science Graduate School Of Engineering Sの論文著者
関連著者
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Nakaiso Toshiyuki
Area Of Materials And Device Physics Department Of Physical Science Graduate School Of Engineering S
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Okuyama Masanori
Area of Advanced Electronics and Optical Science, Department of Systems Innovation, Graduate School of Engineering Science, Osaka University, 1-3 Machikaneyama-cho, Toyonaka, Osaka 560-8531, Japan
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Noda Minoru
Area Of Materials And Device Physics Department Of Physical Science Graduate School Of Engineering S
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Okuyama Masanori
Area Of Materials And Device Physics Department Of Physical Science Graduate School Of Engineering S
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SUGIYAMA Hideki
Area of Materials and Device Physics, Department of Physical Science, Graduate School of Engineering
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野田 三喜男
愛知教大
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OKUYAMA Masanori
Area of Materials and Device Physics, Department of Physical Science, Graduate School of Engineering
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Noda M
Department Of Electronics Fukuoka Institute Of Technology
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Narita Masanao
Institute Of Space And Astronautical Science Japan Aerospace Exploration Agency
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Sugiyama H
Data Storage Amp Retrieval Systems Division Hitachi Ltd.
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NAKAISO Toshiyuki
Area of Materials and Device Physics, Department of Physical Science, Graduate School of Engineering
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Okuyama M
Graduate School Of Engineering Science Osaka University
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Takahashi Mitsue
Area Of Materials And Device Physics Department Of Physical Science Graduate School Of Engineering S
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Adachi Yuji
Matusita Electric Industrial Co.ltd.
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ADACHI Yuji
Area of Materials and Device Physics, Department of Physical Science, Graduate School of Engineering
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Adachi Yuji
Area Of Materials And Device Physics Department Of Physical Science Graduate School Of Engineering S
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Kodama Kazushi
Area Of Materials And Device Physics Department Of Physical Science Graduate School Of Engineering S
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Takahashi M
Institute Of Industrial Science The University Of Tokyo
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Nakaiso Toshiyuki
Area Of Materials And Device Physics Department Of Physical Science Graduate School Of Engineering S
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NOBA Minoru
Area of Materials and Device Physics, Department of Physical Science, Graduate School of Engineering
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Noba Minoru
Area Of Materials And Device Physics Department Of Physical Science Graduate School Of Engineering S
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Okuyama Masanori
Area Of Materials And Device Physics Department Of Physical Science Graduate School Of Engineering S
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Okuyama Masanori
Area of Materials and Device Physics, Department of Physical Science, Graduate School of Engineering Science, Osaka University, 1-3 Machikaneyama-Cho, Toyonaka City, Osaka 560-8531, Japan
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Nakaiso Toshiyuki
Area of Materials and Device Physics, Department of Physical Science, Graduate School of Engineering Science, Osaka University, 1-3 Machikaneyama-Cho, Toyonaka City, Osaka 560-8531, Japan
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Sugiyama Hideki
Area of Materials and Device Physics, Department of Physical Science, Graduate School of Engineering Science, Osaka University, 1-3 Machikaneyama-Cho, Toyonaka City, Osaka 560-8531, Japan
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Takahashi Mitsue
Area of Materials and Device Physics, Department of Physical Science, Graduate School of Engineering Science, Osaka University, 1-3 Machikaneyama-Cho, Toyonaka City, Osaka 560-8531, Japan
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Noda Minoru
Area of Materials and Device Physics, Department of Physical Science, Graduate School of Engineering Science, Osaka University, 1-3 Machikaneyama-Cho, Toyonaka City, Osaka 560-8531, Japan
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Kodama Kazushi
Area of Materials and Device Physics, Department of Physical Science, Graduate School of Engineering Science, Osaka University, 1-3 Machikaneyama-Cho, Toyonaka City, Osaka 560-8531, Japan
著作論文
- Studies on Improving Retention Time of Memorized State of MFIS Structure for Ferroelectric Gate FET Memory
- Low-Temperature Preparation of Sr_2(Ta_ Nb_x)_2O_7 Thin Films by Pulsed Laser Deposition and its Electrical Properties
- An improvement in C-V Characteristics of Metal-Ferroelectric-Insulator-Semiconductor Structure for Ferroelectric Gate FET Memory Using a Silicon Nitride Buffer Layer
- An Improvement in Metal-Ferroelectric-Insulator-Semiconductor Structure for Ferroelectric Gate FET Memory Using a Silicon Nitride Buffer Layer
- Low-Temperature Preparation of Ferroelectric Sr_2(Ta_, Nbx)_2O_7 Thin Films by Pulsed Laser Deposition and Their Application to MFIS Structure
- Low-Temperature Preparation of Ferroelectric Sr2(Ta1-x,Nbx)2O7 Thin Films by Pulsed Laser Deposition and Their Application to Metal-Ferroelectric- Insulator-Semiconductor-FET
- Analysis and Improvement of Retention Time of Memorized State of Metal-Ferroelectric-Insulator-Semiconductor Structure for Ferroelectric Gate FET Memory