Amagasaki Motoki | Graduate School Of Science And Technology Kumamoto University
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概要
関連著者
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Iida Masahiro
Graduate School Of Science And Technology Kumamoto University
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Amagasaki Motoki
Graduate School Of Science And Technology Kumamoto University
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Sueyoshi Toshinori
Graduate School Of Science And Technology Kumamoto University
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Iida Masahiro
Kumamoto Univ. Kumamoto Jpn
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Sueyoshi Toshinori
Kumamoto Univ. Kumamoto Jpn
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Ichinomiya Yoshihiro
Graduate School Of Science And Technology Kumamoto University
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Inoue Kazuki
Graduate School Of Science And Technology Kumamoto University
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Zhao Qian
Graduate School Of Science And Technology Kumamoto University
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Okamoto Yasuhiro
Graduate School Of Natural Science And Technology Okayama University
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Okamoto Yasuhiro
Graduate School Of Science And Technology Kumamoto University
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ZHAO Qian
Graduate School of Science and Technology, Kumamoto University
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SUEYOSHI Toshinori
Graduate School of Science and Technology, Kumamoto University
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INOUE Kazuki
Graduate School of Science and Technology, Kumamoto University
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ICHIDA Yoshinobu
ROHM Co., Ltd.
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SAJI Mitsuro
ROHM Co., Ltd.
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IIDA Jun
ROHM Co., Ltd.
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Saji Mitsuro
Rohm Co. Ltd.
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Koga Masahiro
Graduate School Of Science And Technology Kumamoto University
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Iida Jun
Rohm Co. Ltd.
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KUGA Morihiro
Graduate School of Science and Technology, Kumamoto University
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OKAMOTO Yasuhiro
Graduate School of Natural Science and Technology, Okayama University
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ICHINOMIYA Yoshihiro
Graduate School of Science and Technology, Kumamoto University
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AMAGASAKI Motoki
Graduate School of Science and Technology, Kumamoto University
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Zhao Qian
熊本大 大学院自然科学研究科
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KOGA Masahiro
Graduate School of Science and Technology, Kumamoto University
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Kimura Tsuyoshi
Graduate School of Engineering Science, Osaka University, Toyonaka, Osaka 560-8531, Japan
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KIMURA Tsuyoshi
Graduate School of Science and Technology, Kumamoto University
著作論文
- An Error Detect and Correct Circuit Based Fault-tolerant Reconfigurable Logic Device
- A Genuine Power-Gatable Reconfigurable Logic Chip with FeRAM Cells
- An Easily Testable Routing Architecture and Prototype Chip
- Fault-Injection Analysis to Estimate SEU Failure in Time by Using Frame-Based Partial Reconfiguration
- COGRE : A Novel Compact Logic Cell Architecture for Area Minimization
- FPGA Design Framework Combined with Commercial VLSI CAD
- A Design Framework for Reconfigurable IPs with VLSI CADs