Iida Masahiro | Kumamoto Univ. Kumamoto Jpn

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概要

• IIDA Masahiroの詳細を見る
• 同名の論文著者
• Kumamoto Univ. Kumamoto Jpnの論文著者

関連著者

• Iida Masahiro

  Kumamoto Univ. Kumamoto Jpn

• Iida Masahiro

  Graduate School Of Science And Technology Kumamoto University

• Sueyoshi Toshinori

  Kumamoto Univ. Kumamoto Jpn

• Sueyoshi Toshinori

  Graduate School Of Science And Technology Kumamoto University

• Amagasaki Motoki

  Graduate School Of Science And Technology Kumamoto University

• Ichinomiya Yoshihiro

  Graduate School Of Science And Technology Kumamoto University

• Okamoto Yasuhiro

  Graduate School Of Natural Science And Technology Okayama University

• Okamoto Yasuhiro

  Graduate School Of Science And Technology Kumamoto University

• ZHAO Qian

  Graduate School of Science and Technology, Kumamoto University

• SUEYOSHI Toshinori

  Graduate School of Science and Technology, Kumamoto University

• INOUE Kazuki

  Graduate School of Science and Technology, Kumamoto University

• ICHIDA Yoshinobu

  ROHM Co., Ltd.

• SAJI Mitsuro

  ROHM Co., Ltd.

• IIDA Jun

  ROHM Co., Ltd.

• Inoue Kazuki

  Graduate School Of Science And Technology Kumamoto University

• Saji Mitsuro

  Rohm Co. Ltd.

• Koga Masahiro

  Graduate School Of Science And Technology Kumamoto University

• Iida Jun

  Rohm Co. Ltd.

• Zhao Qian

  Graduate School Of Science And Technology Kumamoto University

• Monji Hideaki

  Graduate School Of Science And Technology Kumamoto University

• OKAMOTO Yasuhiro

  Graduate School of Natural Science and Technology, Okayama University

• Shinohara Hiroshi

  Graduate School Of Science And Technology Kumamoto University

• ICHINOMIYA Yoshihiro

  Graduate School of Science and Technology, Kumamoto University

• AMAGASAKI Motoki

  Graduate School of Science and Technology, Kumamoto University

• Zhao Qian

  熊本大 大学院自然科学研究科

• KOGA Masahiro

  Graduate School of Science and Technology, Kumamoto University

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著作論文

• An Error Detect and Correct Circuit Based Fault-tolerant Reconfigurable Logic Device
• A Novel Technique to Design Energy-Efficient Contexts for Reconfigurable Logic Devices(Reconfigurable Systems)
• A Genuine Power-Gatable Reconfigurable Logic Chip with FeRAM Cells
• An Easily Testable Routing Architecture and Prototype Chip
• COGRE : A Novel Compact Logic Cell Architecture for Area Minimization

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