Antono Danardono | Institute Of Industrial Science The University Of Tokyo:(present Office)sony Corporation

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概要

• ANTONO Danardono Dwiの詳細を見る
• 同名の論文著者
• Institute Of Industrial Science The University Of Tokyo:(present Office)sony Corporationの論文著者

関連著者

• Antono Danardono

  Institute Of Industrial Science The University Of Tokyo:(present Office)sony Corporation

• 桜井 貴康

  東京大学

• 桜井 貴康

  Institute Of Industrial Science University Of Tokyo

• Kawaguchi H

  Institute Of Industrial Science The University Of Tokyo:(present Office)kobe University

• Sakurai Takayasu

  Institute Of Industrial Science & Center For Collaborative Research The University Of Tokyo

• Kawaguchi H

  Univ. Tokyo Tokyo Jpn

• Antono Danardono

  Institute Of Industrial Science The University Of Tokyo

• SAKURAI Takayasu

  Institute of Industrial Science, The University of Tokyo

• INAGAKI Kenichi

  the University of Tokyo

• SAKURAI Takayasu

  The University of Tokyo

• Kawaguchi Hiroshi

  Kobe Univ. Kobe‐shi Jpn

• KAWAGUCHI Hiroshi

  Institute of Industrial Science, the University of Tokyo

• Sakurai Takayasu

  University Of Tokyo

• Sakurai Takayasu

  Institute Of Industrial Science The University Of Tokyo

• Sakurai Takayasu

  Institute Of Industrial Science University Of Tokyo

• Kawaguchi Hiroshi

  Department Of Computer Science And Systems Engineering Kobe University

• Kawaguchi Hiroshi

  Institute Of Industrial Science The University Of Tokyo:(present Office)kobe University

• Antono D

  東大 生産技研

• ANTONO Danardono

  University of Tokyo

• INAGAKI Kenichi

  University of Tokyo

• KAWAGUCHI Hiroshi

  University of Tokyo

• ANTONO Danardono

  the University of Tokyo

• Kawaguchi Hiroshi

  Institute Of High Speed Mechanics Tohoku University

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著作論文

• Simple Waveform Model of Inductive Interconnects by Delayed Quadratic Transfer Function with Application to Scaling Trend of Inductive Effects in VLSI's(Interconnect,VLSI Design and CAD Algorithms)
• A-3-15 POWER CONSUMPTION DISTRIBUTION IN DSM INTERCONNECTS WITH INDUCTIVE EFFECTS
• Closed-Form Expressions for Crosstalk Noise and Worst-Case Delay on Capacitively Coupled Distributed RC Lines(Physical Design,VLSI Design and CAD Algorithms)
• Trends of On-Chip Interconnects in Deep Sub-Micron VLSI (Interconnect Technique, VLSI Design Technology in the Sub-100nm Era)
• A-3-7 Inductance Effect on VLSI Interconnections

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