Ker Ming-dou | Nanoelectronics And Gigascale Systems Laboratory Institute Of Electronics National Chiao-tung Univer
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関連著者
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Ker Ming-dou
Nanoelectronics And Gigascale Systems Laboratory Institute Of Electronics National Chiao-tung Univer
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KER Ming-Dou
Nanoelectronics and Gigascale Systems Laboratory, Institute of Electronics, National Chiao-Tung Univ
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Ker Ming‐dou
National Chiao‐tung Univ. Hsinchu Twn
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CHEN Jung-Sheng
Nanoelectronics and Gigascale Systems Laboratory, Institute of Electronics, National Chiao-Tung Univ
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Chen Jung-sheng
Nanoelectronics And Gigascale Systems Laboratory Institute Of Electronics National Chiao-tung Univer
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Ker M‐d
National Chiao‐tung Univ. Hsinchu Twn
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Hsiao Yuan-wen
Nanoelectronics And Gigascale Systems Laboratory Institute Of Electronics National Chiao-tung Univer
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Peng Jeng-jie
Esd Protection Technology Department Soc Technology Center Industrial Technology Research Institute
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Chu Ching-yun
Silicon Integrated Systems Corp. Science-based Industrial Park
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LIN Chun-Yu
Nanoelectronics and Gigascale Systems Laboratory, Institute of Electronics, National Chiao-Tung Univ
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MENG Guo-Xuan
Nanoelectronics and Gigascale Systems Laboratory, Institute of Electronics, National Chiao-Tung Univ
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HSU Hsin-Chyh
Nanoelectronics and Gigascale Systems Laboratory, Institute of Electronics, National Chiao-Tung Univ
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Chang Chyh-yih
Esd Protection Technology Department Soc Technology Center Industrial Technology Research Institute
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Lin Chun‐yu
Nanoelectronics And Gigascale Systems Laboratory Institute Of Electronics National Chiao-tung Univer
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Hsu Hsin-chyh
Nanoelectronics And Gigascale Systems Laboratory Institute Of Electronics National Chiao-tung Univer
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Meng Guo-xuan
Nanoelectronics And Gigascale Systems Laboratory Institute Of Electronics National Chiao-tung Univer
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Ker Ming-dou
Nanoelectronics And Gigascale Systems Laboratory Institute Of Electronics National Chiao-tung Univer
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Ker Ming-dou
Nanoelectronics And Gigascale Systems Laboratory Institute Of Electronics National Chiao-tung Univer
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Chen Jung-sheng
Nanoelectronics And Gigascale Systems Laboratory Institute Of Electronics National Chiao-tung Univer
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Hsu Hsin-chyh
Nanoelectronics And Gigascale Systems Laboratory Institute Of Electronics National Chiao-tung Univer
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Lin Yu-Ta
Nanoelectronics and Gigascale Systems Laboratory, Institute of Electronics, National Chiao-Tung University, 1001 Ta-Hsueh Road, Hsinchu, Taiwan 300, R.O.C.
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Hsu Kuo-Chun
Nanoelectronics and Gigascale Systems Laboratory, Institute of Electronics, National Chiao-Tung University, 1001 Ta-Hsueh Road, Hsinchu, Taiwan, R.O.C.
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Ker Ming-Dou
Nanoelectronics and Gigascale Systems Laboratory, Institute of Electronics, National Chiao-Tung University, 1001 Ta-Hsueh Road, Hsinchu, Taiwan
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Ker Ming-Dou
Nanoelectronics and Gigascale Systems Laboratory, Institute of Electronics, National Chiao-Tung University, 1001 Ta-Hsueh Road, Hsinchu, Taiwan 300, R.O.C.
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Ker Ming-Dou
Nanoelectronics and Gigascale Systems Laboratory, Institute of Electronics, National Chiao-Tung University, 1001 Ta-Hsueh Road, Hsinchu, Taiwan, R.O.C.
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Wang Tzu-Ming
Nanoelectronics and Gigascale Systems Laboratory, Institute of Electronics, National Chiao-Tung University, 1001 Ta-Hsueh Road, Hsinchu, Taiwan 300, R.O.C.
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Chang Chyh-Yih
ESD Protection Technology Department, SoC Technology Center, Industrial Technology Research Institute (ITRI), Bldg. 14, 195, Sec. 4, Chung-Hsing Rd., Chutung, Hsinchu, Taiwan
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Tseng Tang-Kui
Product and ESD Engineering Department, SoC Technology Center, Industrial Technology Research Institute (ITRI), Bldg. 14, 195, Sec. 4, Chung-Hsing Rd., Chutung, Hsinchu, Taiwan, R.O.C.
著作論文
- Circuit Performance Degradation of Switched-Capacitor Circuit with Bootstrapped Technique due to Gate-Oxide Overstress in a 130-nm CMOS Process
- Low-Capacitance and Fast Turn-on SCR for RF ESD Protection
- Impedance-Isolation Technique for ESD Protection Design in RF Integrated Circuits
- Novel Implantation Method to Improve Machine-Model Electrostatic Discharge Robustness of Stacked N-Channel Metal-Oxide Semiconductors (NMOS) in Sub-Quarter-Micron Complementary Metal-Oxide Semiconductors (CMOS) Technology : Semiconductors
- Design and Implementation of Readout Circuit with Threshold Voltage Compensation on Glass Substrate for Touch Panel Applications
- A CMOS Bandgap Reference Circuit for Sub-1-V Operation without Using Extra Low-Threshold-Voltage Device(Electronic Circuits)
- Dummy-Gate Structure to Improve Turn-on Speed of Silicon-Controlled Rectifier (SCR) Device for Effective Electrostatic Discharge (ESD) Protection
- High-Current Characterization of Polysilicon Diode for Electrostatic Discharge Protection in Sub-Quarter-Micron Complementary Metal Oxide Semiconductor Technology
- Active Electrostatic Discharge (ESD) Device for On-Chip ESD Protection in Sub-Quarter-Micron Complementary Metal-Oxide Semiconductor (CMOS) Process