OH Jae | National Nanofab Center
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概要
関連著者
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OH Jae
National Nanofab Center
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KIM Young
National Nanofab Center
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KANG Min
National Nanofab Center
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YOO Dong
National Nanofab Center
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LEE Hi
Dept. of Electronic Engineering, Chungnam National University
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Cho Byung
Department Of Eecs Kaist
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Lee Hi
Dept. Of Electronic Engineering Chungnam National University
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LEE Ga
Dept. of Electronic Engineering, Chungnam National University
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Kim Young
National Genome Information Center Korea Research Institute Of Bioscience And Biotechnology
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Park Jong
Department Mathematics Pusan National University
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Kim Young
National Center for Nanoprocess and Equipments, Honam Technology Division, Korea Institute of Industrial Technology, Gwangju 500-480, Korea
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JEONG Kang
Dept. of Electronic Engineering, Chungnam National University
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LIM Sung
National Nanofab Center
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Jeong Kang
Dept. Of Electronic Engineering Chungnam National University
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LEE Seok-Hee
Department of Electrical Engineering, KAIST
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Lee Ga-won
Dept. Of Electronics Engineering Chungnam National University
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SONG Myeong
National Nanofab Center
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JOO Moon
Hynix Semiconductor Inc.
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HONG Kwon
Hynix Semiconductor Inc.
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Park Youngmin
Department Of Electrical Engineering Korea Advanced Institute Of Science And Technology
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Lee Ga‐won
Dept. Of Electronic Engineering Chungnam National University
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Lee Ga
Dept. Of Electronic Engineering Chungnam National University
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Oh Jae
National Nanofab Center, Daejeon 305-701, Korea
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LEE Ki-Hong
Hynix Semiconductor Inc.
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PYI Seung
Hynix Semiconductor Inc.
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PARK Jong
Department of Internal Medicine, Chonnam National University Hospital
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CHO Byung
Department of Electrical Engineering, KAIST
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Cho Byung
Department Of Electrical And Computer Engineering National University Of Singapore
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PARK Youngmin
Department of Electrical Engineering, Korea Advanced Institute of Science and Technology
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OH Jae
Dept. of Electronic Engineering, Chungnam National University
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CHOI Kwang
Dept. of Electronic Engineering, Chungnam National University
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SONG Myeong
Dept. of Electronic Engineering, Chungnam National University
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YOO Dong
Dept. of Electronic Engineering, Chungnam National University
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PARK Jeong
Dept. of Electronic Engineering, Chungnam National University
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Cho Byung
Department Of Electrical Engineering Korea Advanced Institute Of Science And Technology
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Yoo Dong
Dept. Of Electronic Engineering Chungnam National University
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Oh Jae
Dept. Of Electronic Engineering Chungnam National University
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Choi Kwang
Dept. Of Electronic Engineering Chungnam National University
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Park Jeong
Dept. Of Electronic Engineering Chungnam National University
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Park Jong
Department Of Electrical Engineering Korea Advanced Institute Of Science And Technology
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Kim Yu
Dept. Of Electronic Engineering Chungnam National University
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Lee Seok-Hee
Department of Electrical Engineering, Korea Advanced Institute of Science and Technology, Daejeon 305-701, Korea
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Lim Sung
National Nanofab Center, Daejeon 305-701, Korea
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Lee Ki-Hong
Hynix Semiconductor Inc., Icheon, Gyeonggi 467-701, Korea
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PARK Jong
Department of Electrical Engineering, KAIST
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Park Jong
Department of Electrical Engineering, Korea Advanced Institute of Science and Technology, Daejeon 305-701, Korea
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Park Jong
Department of Electrical Engineering, KAIST, Daejeon 305-701, Korea
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Lee Seok-Hee
Department of Electrical Engineering, KAIST, Daejeon 305-701, Korea
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Pyi Seung
Hynix Semiconductor Inc., Icheon, Gyeonggi 467-701, Korea
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Joo Moon
Hynix Semiconductor Inc., Icheon, Gyeonggi 467-701, Korea
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Cho Byung
Department of Electrical Engineering, Korea Advanced Institute of Science and Technology, Daejeon 305-701, Korea
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Cho Byung
Department of Electrical Engineering, KAIST, Daejeon 305-701, Korea
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Hong Kwon
Hynix Semiconductor Inc., Icheon, Gyeonggi 467-701, Korea
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Park Youngmin
Department of Electrical Engineering, Korea Advanced Institute of Science and Technology, Daejeon 305-701, Korea
著作論文
- Dual-gate ZnO thin-film transistors with SiNx as Dielectric Layer(Session 1A : Emerging Device Technology 1)
- Dual-gate ZnO thin-film transistors with SiNx as Dielectric Layer(Session 1A : Emerging Device Technology 1)
- Cubic-Structured HfLaO for the Blocking Layer of a Charge-Trap Type Flash Memory Device
- SONOS-Type Flash Memory with HfO_2 Thinner than 4nm as Trapping Layer Using Atomic Layer Deposition
- Mechanism of Date Retention Improvement by High Temperature Annealing of Al2O3 Blocking Layer in Flash Memory Device
- Dual-Gate ZnO Thin-Film Transistors with SiNx as Dielectric Layer
- Improvement of Charge Retention in Flash Memory Devices by Very Light Doping of Lanthanum into an Aluminum-Oxide Blocking Layer
- Improvement of Charge Retention in Flash Memory Devices by Very Light Doping of Lanthanum into an Aluminum-Oxide Blocking Layer