Investigation of Vertical Channel Architecture for Bulk Erase Operation in Three-Dimensional NAND Flash Memory
スポンサーリンク
概要
- 論文の詳細を見る
A bit-cost scalable (BiCS) technology using a bulk erasing method instead of the conventional erase operation using gate-induced drain leakage (GIDL) is proposed to realize better cell characteristics and process feasibility for three-dimensional (3D) NAND flash memory. This has an additional electrode layer for a bulk erase operation in the middle of a vertical string cell. Here, we confirmed that this structure using an additional electrode provides good program and erasing speed by simulation. Furthermore, junction engineering is performed to realize a polysilicon layer of the flat plate type as a bulk electrode for better design feasibility. From this result, we expect that a bulk erasable BiCS technology using a flat plate erase electrode can be a candidate 3D NAND flash memory technology.
- 2012-11-25
著者
-
Song Yun-Heub
Department of Electronic Engineering, Hanyang University, Seoul 133-791, Korea
-
Yang Hyung
Department of Electronic Engineering, Hanyang University, Seoul 133-791, Korea
-
Lee Gae-Hun
Department of Electronic Engineering, Hanyang University, Seoul 133-791, Korea
-
Kim Kyeong-Rok
Department of Electronic Engineering, Hanyang University, Seoul 133-791, Korea
-
Park Sung-Kye
SK hynix Semiconductor, Icheon, Gyeonggi 467-701, Korea
-
Cho Gyu-Seog
SK hynix Semiconductor, Icheon, Gyeonggi 467-701, Korea
-
Choi Eun-Seok
SK hynix Semiconductor, Icheon, Gyeonggi 467-701, Korea
関連論文
- Ultrashallow Junction Formation by Rapid Thermal Annealing of Arsenic-Adsorbed Layer
- Multilevel Charge Storage in a Multiple Alloy Nanodot Memory
- A Reliable Nonvolatile Memory Using Alloy Nanodot Layer with Extremely High Density
- Investigation of Vertical Channel Architecture for Bulk Erase Operation in Three-Dimensional NAND Flash Memory
- Bidirectional Two-Terminal Switching Device Using Schottky Barrier for Spin-Transfer-Torque Magnetic Random Access Memory
- Bidirectional Two-Terminal Switching Device for Non-Volatile Random Access Memory
- Research of Bulk Erase Operation in Vertical Three-Dimensional Cell Array Architecture
- Research of Bulk Erase Operation in Vertical Three-Dimensional Cell Array Architecture (Special Issue : Solid State Devices and Materials)