Study On Charge Trap Layers In Charge Trap Metal–Oxide–Semiconductor Field Effect Transistor

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概要

• 論文の詳細を見る

• In this study, we have investigated the two types of charge trap devices in terms of performance and reliability. Either a silicon rich oxide (SRO) layer or a silicon rich oxynitride (SRON) trap layer was used as a charge trap layer. The trap layers were deposited by atomic layer deposition (ALD). The transistor with an SRO trap layer combined with a 3.5-nm-thick tunneling oxide layer yields the best electrical properties in terms of speed and retention. The device with an SRON trap layer yields slower programming/erasing behaviors and a lower retention owing to noncrystallites in the SRON thin film.

• 2009-02-25

著者

• Chung Ilsub

  School of Info rolation and Communications Engineering, Sun gKyunKwan University

• Yeo In-Seok

  Process Development Team, Memory Division, Semiconductor Business, Samsung Electronics Co., Ltd., San #24 Nongseo-ri, Giheung-eup, Yongin, Gyeonggi-do 449-177, Korea

• Cho Seung

  School of Information and Communication Engineering, Sungkyunkwan University, Suwon 440-746, Korea

• Joo Kyong

  Process Development Team, Memory Division, Semiconductor Business, Samsung Electronics Co., Ltd., San #24 Nongseo-ri, Giheung-eup, Yongin, Gyeonggi-do 449-177, Korea

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