Performance Comparison between Asymmetric Polycrystalline Silicon Gate and TiN Gate Fin-Shaped Field Effect Transistors
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概要
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We report our numerical study on the device performance of an asymmetric polycrystalline silicon (poly-Si) gate fin-shaped field effect transistor (FinFET) and FinFET with TiN metal gate structure. Our numerical simulation revealed that the asymmetric poly-Si FinFET structures and TiN gate FinFET structures exhibits a superior $V_{\text{T}}$ tolerance to the conventional FinFET structure with respect to the variation of fin thickness. For instance, the $V_{\text{T}}$ tolerance of the asymmetric poly-Si FinFET were 0.02 V while TiN gate FinFET exhibited 0.015 V tolerance for the variation of the fin thickness of 5 nm (from 30 to 35 nm) while the conventional FinFET demonstrates 0.12 V fluctuation for the same variation of the fin thickness. Our numerical simulation revealed that threshold voltage ($V_{\text{T}}$) can be controlled within $- 0.1$ to $+ 0.5$ V by the varying of doping concentration of the asymmetric poly-Si gate region from $1.0\times 10^{18}$ to $1.0\times 10^{20}$ cm-3.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2008-06-25
著者
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Won Taeyoung
Department Of Electrical Engineering National It Research Center For Computational Electronics Inha
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Kim Han-geon
Department of Electrical Engineering, School of Information Technology Engineering, Information Technology Research Center (ITRC) for Computational Electronics, Inha University, 253 Yonghyun-dong, Nam-gu, Incheon 402-751, Korea
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Won Taeyoung
Department of Electrical Engineering, School of Information Technology Engineering, Information Technology Research Center (ITRC) for Computational Electronics, Inha University, 253 Yonghyun-dong, Nam-gu, Incheon 402-751, Korea
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- Two-Dimensional Quantum-Mechanical Modeling and Simulation of Strained-Si Fin Field Effect Transistor (FinFET) on SiGe-On-Insulator
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