Fast and Accurate Simulation for Topography in Nanometer Semiconductor Process

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概要

• 論文の詳細を見る
• 2005-09-13

著者

• Lee Jun-gu

  Department Of Electrical Engineering School Of Engineering Inha University

• WON Taeyoung

  Department of Electrical Engineering, School of Engineering, Inha University

• Won Taeyoung

  Department Of Electrical Engineering National It Research Center For Computational Electronics Inha

関連論文

• Fast and Accurate Simulation for Topography in Nanometer Semiconductor Process
• Two-Dimensional Quantum-Mechanical Modeling and Simulation of Strained-Si Fin Field Effect Transistor (FinFET) on SiGe-On-Insulator
• Two-Dimensional Quantum Mechanical Modeling of Strained-Si FinFETs on SiGe-On-Insulator(SGOI)
• Device Optimization of Multiple-Channel Field Effect Transistor with Two Dimensional Poisson–Schrödinger Solver
• Ab-initio Study on Energy Barrier for Neutral Indium Migration in a Silicon Substrate
• Atomistic Modeling of Boron Diffusion with Germanium Pre-amorphization for Ultra Shallow S/D Junction in nanometer-scale PMOS Devices
• Nanoscale Device Modeling and Simulation: Fin Field-Effect Transistor (FinFET)
• Kinetic Monte Carlo Modeling of Boron Diffusion in Strained Silicon
• Two-Dimensional Quantum-Mechanical Modeling and Simulation of Strained-Si Fin Field Effect Transistor (FinFET) on SiGe-On-Insulator
• Performance Comparison between Asymmetric Polycrystalline Silicon Gate and TiN Gate Fin-Shaped Field Effect Transistors
• Topography Simulation for Nanometer Semiconductor Process

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