Memory Operation of InAs Quantum Dot Heterostructure Field Effect Transistor
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概要
- 論文の詳細を見る
The memory operation of a self-assembled InAs quantum dot heterostructure field effect transistor (FET) is presented. The amount of trapped electrons in the quantum dots determines the gate-source capacitance and the drain current at a gate bias. In capacitance–voltage ($C$–$V$) measurement at low frequency, the quantum dots respond to the signal and a difference of capacitance was observed. These results imply that the memory operation is due to the charge trapping effect of InAs quantum dots.
- Publication Office, Japanese Journal of Applied Physics, Faculty of Science, University of Tokyoの論文
- 2001-04-30
著者
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KIM Moondeock
Optoelectronics Division, Samsung Electronics
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Hong Songcheol
Department Of Electrical Engineering And Computer Science (eecs) Korea Advanced Institute Of Science
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Son Heesoo
Department Of Electrical Engineering And Computer Science Kaist
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Kim Junggun
Department Of Electrical Engineering And Computer Science Korea Advanced Institute Of Science And Te
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Hong Songcheol
Department of Electrical Engineering and Computer Science, Korea Advanced Institute of Science and Technology, 373-1 Kusong-dong, Yusong-gu, Taejeon 305-701, Korea
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Kim Junggun
Department of Electrical Engineering and Computer Science, Korea Advanced Institute of Science and Technology, 373-1 Kusong-dong, Yusong-gu, Taejeon 305-701, Korea
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Son Heesoo
Department of Electrical Engineering and Computer Science, Korea Advanced Institute of Science and Technology, 373-1 Kusong-dong, Yusong-gu, Taejeon 305-701, Korea
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Kim Moondeock
Optoelectronics Division, Samsung Electronics, 416 Maetan-3 dong, Paldal-gu, Suwon, Kyungki-do 442-742, Korea
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