Double-Level Cu Inlaid Interconnects with Simultaneously Filled Via Plugs
スポンサーリンク
概要
- 論文の詳細を見る
A double-level Cu interconnection process for lower submicron generation ULSIs was developed. Cu interconnects were successfully formed by Cu/WSiN sputtering, XeCl excimer laser annealing and Cu/WSiN chemical mechanical polishing. The composition of the WSiN barrier metal was optimized to WSi0.6N and the diffusion barrier capability was confirmed by physical analyses and electrical measurements. The electrical resistivity of the inlaid Cu was 1.9±0.1 µ Ω·cm and contact resistivity between the first-level Cu and the second-level Cu was (1.54–5.78)×10-9 Ω·cm2. The electromigration lifetime of laser-annealed Cu/WSiN wiring was found to be one order of magnitude longer than that of previously reported Cu interconnects. The activation energy for electromigration was determined to be 1.1 eV.
- INSTITUTE OF PURE AND APPLIED PHYSICSの論文
- 1996-02-28
著者
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MINAMIHABA Gaku
ULSI Research Laboratories, TOSHIBA Corporation
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IIJIMA Tadashi
ULSI Research Laboratories, TOSHIBA Corporation
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SHIMOOKA Yoshiaki
ULSI Research Laboratories, TOSHIBA Corporation
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KAWANOUE Takashi
ULSI Research Laboratories, TOSHIBA Corporation
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HIRABAYASHI Hideaki
Manufacturing Engineering Research Center, TOSHIBA Corporation
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OBARA Takashi
Manufacturing Engineering Research Center, TOSHIBA Corporation
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KUBOTA Takeshi
Semiconductor Division, TOSHIBA Corporation
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SHIMIZU Toshio
Semiconductor Division, TOSHIBA Corporation
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KOYAMA Mitsutoshi
Semiconductor Division, TOSHIBA Corporation
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Tamura Hitoshi
Ulsi Process Engineering Lab. Microelectronics Engineering Lab. Toshiba Corp.
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Ooshima Jiro
Semiconductor Division Toshiba Corporation
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Ohkawa Hideki
Manufacturing Engineering Research Center Toshiba Corporation
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Sakurai Naoaki
Manufacturing Engineering Research Center Toshiba Corporation
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Idaka Toshiaki
Semiconductor Division Toshiba Corporation
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Egawa Hidemitu
Semiconductor Division Toshiba Corporation
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Suguro Kyoichi
Ulsi Research Center Toshiba Corporation
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Suguro Kyoichi
ULSI Research Laboratories, TOSHIBA Corporation, 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 210, Japan
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Sakurai Naoaki
Manufacturing Engineering Research Center, TOSHIBA Corporation, 33, Shin-isogocho, Isogo-ku, Yokohama, 235, Japan
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Koyama Mitsutoshi
Semiconductor Division, TOSHIBA Corporation, 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 210, Japan
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Tamura Hitoshi
ULSI Research Laboratories, TOSHIBA Corporation, 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 210, Japan
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Hirabayashi Hideaki
Manufacturing Engineering Research Center, TOSHIBA Corporation, 33, Shin-isogocho, Isogo-ku, Yokohama, 235, Japan
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Iijima Tadashi
ULSI Research Laboratories, TOSHIBA Corporation, 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 210, Japan
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Egawa Hidemitu
Semiconductor Division, TOSHIBA Corporation, 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 210, Japan
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Kawanoue Takashi
ULSI Research Laboratories, TOSHIBA Corporation, 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 210, Japan
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Ooshima Jiro
Semiconductor Division, TOSHIBA Corporation, 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 210, Japan
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Minamihaba Gaku
ULSI Research Laboratories, TOSHIBA Corporation, 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 210, Japan
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Shimooka Yoshiaki
ULSI Research Laboratories, TOSHIBA Corporation, 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 210, Japan
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Ohkawa Hideki
Manufacturing Engineering Research Center, TOSHIBA Corporation, 33, Shin-isogocho, Isogo-ku, Yokohama, 235, Japan
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Shimizu Toshio
Semiconductor Division, TOSHIBA Corporation, 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 210, Japan
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Obara Takashi
Manufacturing Engineering Research Center, TOSHIBA Corporation, 33, Shin-isogocho, Isogo-ku, Yokohama, 235, Japan
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Kubota Takeshi
Semiconductor Division, TOSHIBA Corporation, 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 210, Japan
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Idaka Toshiaki
Semiconductor Division, TOSHIBA Corporation, 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki 210, Japan
関連論文
- Double-Level Cu Inlaid Interconnects with Simultaneously Filled Via Plugs
- Optimization of a High-Performance Chemically Amplified Positive Resist for Electron-Beam Lithography
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- Homogeneous Heteroepitaxial NiSi_2 Formation on (100)Si
- Double-Level Cu Inlaid Interconnects with Simultaneously Filled Via Plugs