A-1-2 Measurement of CSSAL Multiplier over GF(2^4) LSI Implemented in 0.18μm CMOS Technology
スポンサーリンク
概要
- 論文の詳細を見る
This paper presents a measurement result of the charge-sharing symmetric adiabatic logic (CSSAL) multiplier over GF(2^4) LSI implemented in 0.18μm CMOS process technology. Supply current traces regard to input-output transitions are measured at 1.25MHz of power clock frequency, and achieved 1.13μW of power consumption.
- 一般社団法人電子情報通信学会の論文
- 2014-03-04
著者
-
SEKINE Toshikazu
Faculty Engineering Gifu University Japan
-
MONTEIRO Cancio
Graduate School of Engineering Gifu University Japan
-
TAKAHASHI Yasuhiro
Faculty Engineering Gifu University Japan
関連論文
- A-1-18 Overlapped-voltage clock driver and low peak voltage evaluation for 2PASCL
- Synthesis and Pharmacological Activity of O-(5-Isoxazolyl)-L-serine
- Structure and Synthesis of a New Monoterpenoidal Carboxamide from the Seeds of the Thai Medicinal Plant Acacia concinna
- Antiallergic Activity of Curcuma longa (II) : Features of inhibitory actions on histamine release from mast cells
- Antiallergic Activity of Curcuma longa (I) : Effectiveness of Extracts Containing Curcuminoids
- A-7-6 Investigation Study of Inner-cell Bit-Parallel Multiplier over GF(2^m) Using Secure Adiabatic Logic Style
- Survey on Secure Adiabatic Logic for Countermeasure against Side-Channel Attacks
- C-12-41 LSI Implementation of over GF(24) using Ad a Bit-Parallel Cellular Multi Charge-Sharing Symmetric iabatic Logic.plier
- Survey on Secure Adiabatic Logic for Countermeasure against Side-Channel Attacks
- LSI Implementation of a Secure Low-Power CSSAL Cellular Multiplier
- A-1-2 Measurement of CSSAL Multiplier over GF(2^4) LSI Implemented in 0.18μm CMOS Technology