High Integrity Gate Insulator Films on Atomically Flat Silicon Surface(Session 7A : Gate Oxides)

概要

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A low temperature atomically flattening technology for Si(100) wafer is developed. By annealing in ultra pure argon ambient at 800℃, atomically flat surfaces composed of atomic terraces and steps appear uniformly in the whole 200 mm wafer without generating slip line defects. Moreover, the whole 200 mm wafer surface can be atomically flattened in shorter time by increasing the argon gas flow rate and the annealing temperature of vertical furnace. Furthermore, the MOS capacitors with the atomically flat gate oxide/Si interface formed by radical oxidation on the flattened surface show superior insulating properties such as higher E_<bd> and Q_<bd>.
2010-06-23