Submicrometer Gold Interconnect Wiring by Sidewall Electroplating Technology
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概要
- 論文の詳細を見る
- 社団法人応用物理学会の論文
- 1994-04-01
著者
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Hirano M
Department Of Electrical And Computer Engineering Nagoya Institute Of Technology
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Hirano Makoto
Ntt Lsi Laboratories
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Yamasaki Kimiyoshi
NTT LSI Laboratories
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AOYAMA Shinji
NTT LSI Laboratories
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Yamasaki K
Ntt Lsi Laboratories
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- A New p-Channel AlGaAs/GaAs MIS-Like Heterostructure FET Employing Two Dimensional Hole Gas
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- Light Detection by Superconducting Weak Link Fabricated with High-Critical-Temperature Oxide-Superconductor Film
- GaAs Taper Etching by Mixture Gas Reactive Ion Etching System
- Low-Resistance Ohmic Contacts to p-GaAs
- A 0.1μm Au/WSiN Gate GaAs MESFET with New BP-LDD Structure and Its Applications
- Submicrometer Gold Interconnect Wiring by Sidewall Electroplating Technology
- Three-Dimensional Passive Elements for Compact GaAs MMICs (Special Issue on Microwave and Millimeter-Wave Technology for Advanced Functioions and Size-Reductions)
- Asynchronous Transfer Mode Switching LSI Chips with 10-Gb/s Serial I/O Ports(Special Issue on the 1994 VLSI Circuits Symposium)
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