FEOL Process for Sub-100nm DRAM
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概要
- 論文の詳細を見る
Key technologies in front end of line (FEOL) process of DRAM for sub-100nm node generation are reviewed.
- 社団法人電子情報通信学会の論文
- 2002-06-24
著者
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Choi Siyoung
Process Development Team, Memory Division, Semiconductor Business, Samsung Electronics Co., Ltd.
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Choi S
Samsung Electronics Co. Ltd. Kyunggi‐do Kor
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Choi Siyoung
Process Development Team Semiconductor R&d Division Samsung Electronics Ltd.
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Choi Siyoung
Process Development Team Memory Division Samsung Electronics Co. Ltd.
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Heo Jinhwa
Process Development Team Semiconductor R&d Center Memory Division Samsung Electronics Co.
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Jin Gyoyoung
DRAM PA
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Choi Siyoung
Process Development Team, Semiconductor R&D Center, Memory Division, Samsung Electronics Co.
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