An Efficient Algorithm for Finding All DC Solutions of Piecewise-Linear Circuits(Regular Section)
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概要
- 論文の詳細を見る
An efficient algorithm is proposed for finding all dc solutions of piecewise-linear (PWL) circuits. This algorithm is based on a powerful test (termed the LP test) for nonexistence of a solution to a system of PWL equations in a given region using the dual simplex method. The proposed algorithm also uses a special technique that decreases the number of regions on which the LP test is performed. By numerical examples, it is shown that the proposed algorithm could find all solutions of large scale problems, including those where the number of variables is 500 and the number of linear regions is 10^500, in practical computation time.
- 社団法人電子情報通信学会の論文
- 2002-11-01
著者
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Sato M
School Of Pharmaceutical Sciences University Of Shizuoka:(present Address)marusa Corporation
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YAMAMURA Kiyotaka
the Faculty of Science and Engineering, Chuo University
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SATO Masaki
the Faculty of Science and Engineering, Chuo University
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NAKAMURA Osamu
the Faculty of Science and Engineering, Chuo University
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KUMAKURA Takayoshi
the Faculty of Science and Engineering, Chuo University
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Sato Masaki
The Faculty Of Science And Engineering Chuo University
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Yamamura Kiyotaka
The Faculty Of Engineering Gunma University
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Kumakura Takayoshi
The Faculty Of Science And Engineering Chuo University:(present Address)pioneer Co. Ltd.
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Nakamura Osamu
The Faculty Of Science And Engineering Chuo University:(present Address)hitachi Ltd.
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