Crossbar Arbiter Architecture for High-Speed MAPOS Switch(Special Issue on Next Generation Internet Technologies and Their Applications)
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概要
- 論文の詳細を見る
This paper describes a crossbar-switch arbiter for a high-speed MAPOS switch. The arbiter uses the following techniques suitable for variable-length frame switching:1. parallel processing for handling requests from network interfaces ane for resource allocation, 2. techniques such as release-on-request, fast back-to-back transfer, and request prefetching to reduce the arbitration overhead, and 3. a resource sampling technique to enable efficient one-shot multicast processing. Our simulationbased performance evaluation and estimation of the scale of its logic circuits indicated that this arbiter can be implemented through simple hardware.
- 社団法人電子情報通信学会の論文
- 2000-05-25
著者
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Ogura Takashi
Silicon Systems Research Laboratories Nec Corporation
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Ogura Takeshi
Ntt Cyber Space Laboratories
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Takahashi N
Okayama University Of Science
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Ogura T
Ntt Network Innovation Laboratories
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Kawano Tetsuo
Ntt Network Innovation Laboratories
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OGURA Tsuyoshi
The authors are with NTT Network Innovation Laboratories
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YAGI Satoru
The authors are with NTT Network Innovation Laboratories
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KAWANO Tetsuo
The authors are with NTT Network Innovation Laboratories
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MARUYAMA Mitsuru
The authors are with NTT Network Innovation Laboratories
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TAKAHASHI Naohisa
The authors are with NTT Network Innovation Laboratories
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MARUYAMA Mitsuru
NTT Software Laboratories
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Maruyama M
Ntt Network Innovation Laboratories
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