FPGA Implementation of a Digital Chaos Circuit Realizing a 3-Dimensional Chaos Model(Special Section of Papers Selected from ITC-CSCC'97)

概要

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In this letter, a digital circuit realizing a Rossler model is proposed. The proposed circuit features exact reproducibility of chaos signals which is desired in chaos-based communication systems. By employing an FPGA implementation, the proposed circuit can achieve high-speed and low-cost realization. The chaotic behavior of the quasi-chaos of the proposed circuit is analyzed by numerical simulations. To confirm the validity of the FPGA implementation, the proposed circuit is designed by using an FPGA CAD tool, Verilog-HDL. This circuit design showed that the proposed circuit can be implemented onto a single FPGA and can realize real-time chaos generation.
社団法人電子情報通信学会の論文
1998-06-25