A Design of CMOS Chua-Type Analog Chaos Circuit Based on a Signal Flow Graph
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概要
- 論文の詳細を見る
This paper presents a design of CMOS Chua-type analog chaos circuit by using a signal-flow-graph(SFG) method. In this circuit, the transmittance of a nonlinear element is realized by an OTA with a feedback resistor, and other linear elements are realized by op-amp based circuits. The proposed circuit is insensitive to the finite admittance of OTA's and to the parasitics of resistors except a feedback resistor in the nonlinear element. The performance and chaotic behavior of the proposed circuit are confirmed by SPICE simulations.
- 社団法人電子情報通信学会の論文
- 1998-07-25
著者
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INOUE Takahiro
Department of Computer Science and Electrical Engineering, Graduate School of Science and Technology
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TSUNEDA Akio
Department of Computer Science and Electrical Engineering, Graduate School of Science and Technology
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Inoue Takahiro
Department Of Cardiovascular Medicine Graduate School Of Medical Sciences Kyushu University
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TSUNEDA Akio
Graduate School of Science and Technology, Kumamoto University
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Tsuneda Akio
Department Of Computer Science And Electrical Engineering Kumamoto University
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Tsuneda Akio
Graduate School Of Science And Technology Kumamoto University
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Tsuneda Akio
Department Of Computer Science And Communication Engineering Kyushu University
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Tsuneda Akio
Department Of Electrical Engineering And Computer Science Kumamoto University
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KOTAKA Kazuya
Department of Electrical Engineering and Computer Science, Kumamoto University
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Kotaka Kazuya
Department Of Electrical Engineering And Computer Science Kumamoto University
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Inoue Takahiro
Department Of Electrical Engineering And Computer Science Kumamoto University
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Inoue Takahiro
Department Of Anatomic Pathology Graduate School Of Medical Sciences Kyushu University
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