Improvement of Performances of SC Sigma-Delta Modulators (Special Section on JTC-CSCC '92)

概要

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Oversampled analog-to-digital (A / D) converters based on sigma-delta (ΣΔ) modulation are attractive for VLSI implementation because they are especially tolertant of circuit nonidealities and component mismatch. Oversampled ΣΔ modulator has some points which must be improved. Some of these problems are based on the small input signal and the integrator leak. In this paper, ΣΔ A / D converter having a dither circuit to improve the linearity and the compensation technique of the integrator leak are presented. By the simulation, the most suitable dither to improve the linearity of the modulator is obtained as follows: the amplitude is 1 / 150 of input signal maximum amplitude, the frequency is 4-times of the signal-band. Using the compensation circuit of the integrator leak, 72 dB of dynamic range is obtained when op-amp gain is 30 dB.
社団法人電子情報通信学会の論文
1993-06-25