Evaluation of Two Methods for Suppressing Ground Current in the Superconducting Integrated Circuits
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概要
- 論文の詳細を見る
Although larger scale integration enhances the practicability of superconducting Josephson circuits, several technical problems begin to emerge during its progress. One of the problems is the increase of current through a ground plane (ground current). Excess ground current produces additional magnetic field and reduces operation margins of the circuits, because superconducting Josephson devices are very sensitive to magnetic field. In this paper, we evaluate current distribution in a superconducting ground plane by means of both experiments and numerical calculation. We also verify two methods for suppressing the ground current. One is a slot structure in the ground plane, and the other is alignment of the current-extraction point. Suppression of the ground current is quantitatively evaluated.
- （社）電子情報通信学会の論文
- 2011-03-01
著者
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Kobayashi Tadayuki
Department Of Electronic Engineering The University Of Electro-communications
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Kobayashi Tadayuki
University Of Electro-communications
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MORIYA Masataka
University of Electro-Communications
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Moriya Masataka
Department Of Electronic Engineering The University Of Electro-communications
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KUROIWA Keisuke
University of Electro-Communication (UEC Tokyo)
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MIZUGAKI Yoshinao
University of Electro-Communication (UEC Tokyo)
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Moriya Masataka
University Of Electro-communication (uec Tokyo)
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Kobayashi Tadayuki
University Of Electro-communication (uec Tokyo)
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