SiGe Recessed Source-Drain (RSD) Stressors for PMOS : Effect of Device Integration Flow and Increased Ge Content on Electrical Performance

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概要

• 論文の詳細を見る
• 2007-09-19

著者

• ABSIL P.

  IMEC

• Wise R.

  Texas Instruments

• MACHKAOUTSAN V.

  ASM Belgium

• VERHEYEN P.

  IMEC

• TOMASINI P.

  ASM America Inc.

• ENEMAN G.

  IMEC

• LOO R.

  IMEC

• THOMAS S.

  ASM America Inc.

• LU J.

  Texas Instruments assignee to IMEC

• WEIJTMANS J.

  Texas Instruments

関連論文

• Integration of ultra shallow junctions in PVD TaN nMOS transistors with Flash Lamp Annealing
• Study of Dopant Diffusion and Defect Evolution for Advanced Ultra Shallow Junctions based on Atomistic Modeling
• SiGe Recessed Source-Drain (RSD) Stressors for PMOS : Effect of Device Integration Flow and Increased Ge Content on Electrical Performance
• Oxygen-Vacancy-Induced V_t shift in La-containing Devices
• Measurement of Hole Transport Parameters in Ultra-Thin SiGe Layers and Their Application in 2D Device Simulations of Heterojunction pMOSFETs
• Performance and Reliability of 0.35μm/0.25μm HIMOS^【○!R】 Technology for Embedded Flash Memory Applications

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