Interconnect Length Distribution in Si System ULSI
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概要
- 論文の詳細を見る
- 2001-09-25
著者
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Masu Kazuya
Precision And Intelligence Laboratory Tokyo Institute Of Technology
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Yokoyama Yoshisato
Precision And Intelligence Laboratory Tokyo Institute Of Technology
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Takagi Naohiro
Precision And Intelligence Laboratory Tokyo Institute Of Technology
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SHINOKI Hiyouko
Precision and Intelligence Laboratory, Tokyo Institute of Technology
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TSUCHIMA Tomohito
Precision and Intelligence Laboratory, Tokyo Institute of Technology
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Shinoki Hiyouko
Precision And Intelligence Laboratory Tokyo Institute Of Technology
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Tsuchima Tomohito
Precision And Intelligence Laboratory Tokyo Institute Of Technology
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- Small Area Snake Inductor on Si RF CMOS Chip
- On-chip Spiral Inductors Integrated with Wafer-Level Package
- Zero-Crosstalk Bus Line Structure for Global Interconnects in Si ULSI
- Twisted Differential Transmission Line Structure for Global Interconnect in Si LSI
- High-Speed Transmission Circuit for Micro Network on Si ULSI