A Jitter Less VCO Model in PLL for EMTP Simulation
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概要
- 論文の詳細を見る
PLL is used to synchronize the phase of an inverter AC output with that of an utility AC. The dynamic PLL behavior must be accurately simulated for it governs the control performance of an inverter. The VCO part of a PLL conventionally consists of an integrator, which is reset at the instant when it exceeds 2π. A numerical simulation, such as an EMTP simulation, with a fixed time step calculation cannot detect these accurate reset timings. This inconsistency in reset timing induces a phase jitter. The phase error, due to jitter, becomes a severe problem when a large time step is employed to simulate long period phenomena, and the inverter is modeled by the state-space averaging method. This paper proposes a jitter less VCO model for EMTP simulation. The phase jitter of the proposed VCO model is completely suppressed, regardless of the time step length. The improvements are confirmed through EMTP simulations.
- 2004-11-01
著者
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Hikihara Takashi
Department of Electrical Engineering, Kyoto University
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Funaki T
Department Of Electrical Engineering Kyoto University
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Funaki Tsuyoshi
Department Of Electrical Engineering Kyoto University
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Hikihara Takashi
Department Of Electrical Engineering Kyoto University
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Hikihara Takashi
Department of Electric Engineering, Kyoto University
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