Design Considerations for Low-Power Single-Electron Transistor Logic Circuits

スポンサーリンク

概要

• 論文の詳細を見る
• Publication Office, Japanese Journal of Applied Physics, Faculty of Science, University of Tokyoの論文
• 2001-03-01

著者

• Lee B‐h

  Dongguk Univ. Seoul Kor

• Jeong Y‐h

  Pohang Univ. Sci. And Technol. Kyungpook Kor

• Jeong Yoon-ha

  Electrical And Computer Engineering Division Pohang University Of Science And Technology

• JEONG Moon-Young

  Electrical and Computer Engineering Division, Pohang University of Science and Technology

• LEE Bong-Hoon

  Electrical and Computer Engineering Division, Pohang University of Science and Technology

関連論文

• A Technique for Extracting Small-Signal Equivalent-Circuit Elements of HEMTs (Special Issue on High-Frequency/speed Devices in the 21st Century)
• Design Considerations for Low-Power Single-Electron Transistor Logic Circuits
• ED2000-59 / SDM2000-59 Calculation of Electrical Transport Properties for Novel Single Gated Single Electron Transistors
• ED2000-59 / SDM2000-59 Calculation of Electrical Transport Properties for Novel Single Gated Single Electron Transistors
• Effects of Sulfide Treatment on InP Metal-Insulator-Semiconductor Devices with Photochemical Vapor Deposit P_3N_5 Gate Insulators
• Thermal Properties at the Commensurate-Incommensurate Transition of K_2ZnCl_4
• Simple Experimental Determination of the Spread of Trapped Hot Holes Injected in Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) Cells : Optimized Erase and Cell Shrinkage
• Spatial and Temporal Characterization of Programming Charge in SONOS Memory Cell : Effects of Localized Electron Trapping
• Design Considerations for Low-Power Single-Electron Transistor Logic Circuits

スポンサーリンク