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The Authors Are With Institute Of Industrial Science The University Of Tokyo:the Author Is With Vlsi | 論文
- Short Channel Characteristics of Variable Body Factor FD SOI MOSFETs
- Future Electron Devices and SOI Technology : Semi-Planar SOI MOSFETs with Sufficient Body Effect
- Charge Polarity Dependence of Negative Differential Conductance in Room-Temperature Operating Silicon Single-Charge Transistors
- Large Threshold Voltage Shift and Narrow Threshold Voltage Distribution in Ultra Thin Body Silicon Nanocrystal Memories
- Special Issue on Advanced Sub-0.1 μm CMOS Devices
- Mobility Degradation in (110)-Oriented Ultra-thin Body Double-Gate pMOSFETs with SOI Thickness of less than 5nm
- Large Coulomb-Blockade Oscillations and Negative Differential Conductance in Silicon Single-Electron Transistors with [100]- and [110]-Directed Channels at Room Temperature
- Room Temperature Demonstration of Variable Full Width at Half Maximum of Coulomb Oscillation in Silicon Single-Hole Transistor
- Effects of Discrete Quantum Levels on Electron Transport in Silicon Single-Electron Transistors with an Ultra-Small Quantum Dot
- Re-examination of Impact of Intrinsic Dopant Fluctuations on SRAM Static Noise Margin
- Impact of Drain Induced Barrier Lowering on Read Scheme in Silicon Nanocrystal Memory with Two-Bit-per-Cell Operation
- Large Temperature Dependence of Coulomb Blockade Oscillations in Room-Temperature Operating Silicon Single-Hole Transistor
- Origin of Larger Drain Current Variability in N-Type Field-Effect Transistors Analyzed by Variability Decomposition Method
- DMA SRAM TEGにより解析したSRAMのスタティックノイズマージンにおけるDIBLばらつきの影響(IEDM特集(先端CMOSデバイス・プロセス技術))
- 微細MOSトランジスタにおけるDIBLおよび電流立上り電圧ばらつきの統計解析(低電圧/低消費電力技術,新デバイス・回路とその応用)
- Takeuchiプロットを用いたHigh-k/Metal-Gate MOSFETのばらつき評価(低電圧/低消費電力技術,新デバイス・回路とその応用)
- 微細MOSトランジスタにおけるDIBLおよび電流立上り電圧ばらつきの統計解析(低電圧/低消費電力技術,新デバイス・回路とその応用)
- Takeuchiプロットを用いたHigh-k/Metal-Gate MOSFETのばらつき評価(低電圧/低消費電力技術,新デバイス・回路とその応用)
- 完全空乏型SOI MOSFETにおける特性ばらつきとランダムテレグラフノイズ(プロセス科学と新プロセス技術)
- 100億トランジスタのしきい値電圧ばらつき(IEDM特集(先端CMOSデバイス・プロセス技術))