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System LSI Division, Mitsubishi Electric Corporation | 論文
- A Sub 1-V L-Band Low Noise Amplifier SOI CMOS(Special Section on Analog Circuit Techniques and Related Topics)
- Physical Design Methodology for On-Chip 64-Mb DRAM MPEG-2 Encoding with a Multimedia Processor(Special Issue on High-Performance and Low-Power Microprocessors)
- 3.0 Gb/s, 272 mW, 8:1 Multiplexer and 4.1 Gb/s, 388 mW, 1:8 Demultiplexer
- A New Emitter-Follower Circuit for High-Speed and Low-Power ECL
- Design and Experimental Results of CMOS Low-Noise/Driver MMIC Amplifiers for Use in 2.4-GHz and 5.2-GHz Wireless Communications
- 2.4-GHz-Band CMOS RF Front-End Building Blocks at a 1.8-V Supply(Special Section on Analog Circuit Techniques and Related Topics)
- A 10-b 50 MS/s 500-mW A/D Converter Using a Differential-Voltage Subconverter (Special Section on the 1993 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.29, No.4 April 1994))
- A Single-Chip 2.4-GHz RF Transceiver LSI with a Wide-Input-Range Frequency Discriminator(Special Issue on Silicon RF Device & Integrated Circuit Technologies)
- A Dynamically Configurable Multi-Format PSK Demodulator for Digital HDTV Using Broadcasting-Satellite
- Interface Technologies for Memories and ASICs : Review and Future Direction (Special Issue on Ultra-High-Speed IC and LSI Technology)
- A 250 MHz Dual Port Cursor RAM Using Dynamic Data Alignment Architecture
- A Flip-Flop Circuit with a Directly Controlled Emitter-Follower and a Level Stabilizer for Low-Power Prescalers (Special Issue on Ultra-High-Speed IC and LSI Technology)
- A Chip Set for Programmable Real-Time MPEG2 MP@ML Video Encoder(Special Issue on Multimedia, Network, and DRAM LSIs)
- An Artificial Retina LSI with 5000 Frames per Second On-Sensor Projection Function