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Silicon Nano Device Lab. Department Of Electrical And Computer Engineering National University Of Si | 論文
- Silicon Strain-Transfer-Layer (STL) and Graded Source/Drain Stressors for Enhancing the Performance of Silicon-Germanium Channel P-MOSFETs
- N-channel MOSFETs with In-situ Silane-Passivated Gallium Arsenide Channel and CMOS-Compatible Palladium-Germanium Contacts
- Contact Technology employing Nickel-Platinum Germanosilicide Alloys for P-Channel FinFETs with Silicon-Germanium Source and Drain Stressors
- Novel Extended-Pi Shaped Silicon-Germanium (eII-SiGe) Source/Drain Stressors for Strain and Performance Enhancement in P-Channel FinFETs
- Strained N-channel FinFETs with High-stress Nickel Silicide-Carbon Contacts and Integration with FUSI Metal Gate Technology
- A Double-Gate Tunneling Field-Effect Transistor with Silicon-Germanium Source for High-Performance, Low Standby Power, and Low Power Technology Applications
- A Physics-based Compact Model for I-MOS Transistors
- Effectiveness of Aluminum Incorporation in Nickel Silicide and Nickel Germanide Metal Gates for Work Function Reduction
- Sub-30nm P-channel Schottky Source/Drain FinFETs : Integration of Pt_3Si FUSI Metal Gate and High-κ Dielectric
- Sub-30nm Strained P-Channel FinFETs with Condensed SiGe Source/Drain Stressors
- Pulsed Laser Irradiation of Silicon-Germanium-on-Insulator (Si_Ge_OI) Substrates for Strain Relaxation and Defect Reduction
- Strained SiGe-On-Insulator N-MOSFET with Silicon Source/Drain for Drive Current Enhancement
- Double-Spacer Impact-ionization MOS Transistor : Characterization and Analysis
- Schottky Barrier Height Modulation for Nickel Silicide on n-Si (100) using Antimony (Sb) Segregation