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Renesas Technol. Corp. Kodaira‐shi Jpn | 論文
- Threshold Voltage Control Using Floating Back Gate for Ultra-Thin-Film SOI CMOS
- Silicon Wafer Direct Bonding through the Amorphous Layer
- Superjunction by Wafer Direct Bonding
- Silicon Wafer Direct Bonding without Hydrophilic Native Oxides
- Intelligent Power IC with Partial SOI Structure
- Development of time-to-digital converter IC for laser radar
- A CMOS Time-to-Digital Converter LSI with Half-Nanosecond Resolution Using a Ring Gate Delay Line (Special Issue on ASICs for Automotive Electronics)
- Design Guidelines and Process Quality Improvement for Treatment of Device Variations in an LSI Chip(Microelectronic Test Structures)
- Impact of Self-Heating in Wire Interconnection on Timing
- An Approach for Reducing Leakage Current Variation due to Manufacturing Variability
- Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations
- Comprehensive Matching Characterization of Analog CMOS Circuits
- Concise Modeling of Transistor Variations in an LSI Chip and Its Application to SRAM Cell Sensitivity Analysis
- A Novel Expression of Spatial Correlation by a Random Curved Surface Model and Its Application to LSI Design
- A New LDMOS Transistor Macro-Modeling for Accurately Predicting Bias Dependence of Gate-Overlap Capacitance
- Vector-Embedded Karhunen-Loeve Transform and Its Application in Orientation Adaptive Coding of Images